
1997 Oct 22
18
Philips Semiconductors
Product specification
Microcontrollers for universal infrared
remote transmitter applications
PCA84C922; PCA84C923
8
CODING TABLE
The code data transmitted from the LOUT output when any
key is depressed, is stored in a memory area known as the
Coding Table. The PCA84C92X range of microcontrollers
have on-chip ROM specifically for this use (system ROM
may also be used). The Coding Table is addressed via
Port 0 (the Low byte address) and Derivative Port 6 latch
(the High byte address).
The PCA84C922 range of devices have 8 kbytes of ROM
for use as a Coding Table and when accessing this internal
memory, address lines DP65 to DP67 must be LOW.
The PCA84C923 range of devices have 16 kbytes of ROM
for use as a Coding Table and when accessing this internal
memory, address lines DP66 and DP67 must be LOW.
The Coding Table memory size for the PCA84C923D
however, can be extended up to 64 kbytes by adding
external memory (ROM or EPROM). The external memory
data bus is connected to Derivative Port 5. Accessing the
internal or external Coding Tables of the PCA84C923D is
described below.
In the Normal mode (EMU pin LOW)
– When Derivative Port 5 terminal is read, if the
address lines DP66 and DP67 are LOW, the address
will be within the internal memory boundary, and the
internal Coding Table will be accessed.
– When Derivative Port 5 terminal is read, if either of
the address lines DP66 or DP67 is HIGH, the address
will be outside the internal memory boundary and the
external memory will be accessed. The data at
Derivative Port 5 terminal will then be read.
In the Emulation mode (EMU pin HIGH)
– When Derivative Port 5 terminal is read, external
memory will always be accessed. In this situation,
Derivative Port 5 latch cannot be read.
8.1
Accessing the Coding Table
The procedure for accessing the Coding Table follows:
1.
Set all sense lines to a logic 1.
2.
Write the High byte address to Derivative Register 08
(Derivative Port 6 latch).
3.
Write the Low byte address to Port 0 (Low byte
address latch of internal Coding Table).
4.
Read Derivative Register 05 (Derivative Port 5
terminal); code data has now been retrieved.
5.
Repeat steps 4 and 5 to read more code data.
Table 7 shows a subroutine that reads the Coding Table
and then loads code data into system RAM.
Entry:
R0 contains the starting address in system RAM into
which data will be loaded.
R1 contains the number of bytes in the Coding Table
which are to be read.
R3 holds the Coding Table starting address (Low byte).
R4 holds the Coding Table starting address (High byte).
Exit:
((R0)), ((R0) + 1)
→
((R0) + (R1)
1) contain the code
data
Table 7
Subroutine to access the Coding Table
ADDRESS
INSTRUCTION
DESCRIPTION
CODE
ORL P1,#FF
MOV A,R4
MOV D8,A
MOV A,R3
OUTL P0,A
MOV A,D5
MOV @R0,A
DJNZ R1,CODE2
RET
INC R0
INC R3
JMP CODE1
Set all sense lines to logic 1.
Load Accumulator with the High byte of the starting address.
Write the High byte of the starting address to Derivative Port 6 latch.
Load Accumulator with the Low byte of the starting address.
Write the Low byte of the starting address to Port 0.
Read code data from Derivative Port 5 terminal into the Accumulator.
Store code data in system RAM.
If more code data is to be read jump to CODE 2, if not go to next instruction.
Return from subroutine to main program.
Increment RAM address pointer.
Increment Low byte address of Coding Table.
Jump to CODE 1.
CODE1
CODE2