參數(shù)資料
型號: PCA84C922
廠商: NXP Semiconductors N.V.
英文描述: Microcontrollers for universal infrared remote transmitter applications(應用于通用紅外線遙控傳送的微控制器)
中文描述: 對通用紅外遙控發(fā)射器應用微控制器(應用于通用紅外線遙控傳送的微控制器)
文件頁數(shù): 17/36頁
文件大?。?/td> 250K
代理商: PCA84C922
1997 Oct 22
17
Philips Semiconductors
Product specification
Microcontrollers for universal infrared
remote transmitter applications
PCA84C922; PCA84C923
7.6
Operation of the Hardware Modulator
The ON-time, OFF-time, Pulse Counter High and Pulse
Counter Low registers are loaded by software.
As soon as the Pulse Counter Low Register is loaded the
Hardware Modulator is started and LOUT becomes active
(LOW). Simultaneously, the contents of the ON-time
Register are loaded into the Pulse Timer which is then
decremented by ‘1’ every oscillator clock cycle. When the
value held in the Pulse Timer becomes zero the contents
of the Pulse Counter are decremented by ‘1’ and LOUT
becomes inactive (HIGH).
The contents of the OFF-time Register are now loaded into
the Pulse Timer which is decremented by ‘1’ every
oscillator clock cycle. When the value held in the Pulse
Timer becomes zero, LOUT becomes active (LOW). One
pulse cycle has now been generated.
The process of alternately loading the contents of the
ON-time Register and OFF-time Register into the Pulse
Timer continues until the contents of the Pulse Counter
become zero. When this occurs EXDI is asserted; an
interrupt to the CPU is generated and the interrupt flag is
raised stopping the operation of the Hardware Modulator.
The programmed pulse train has now been generated.
The Hardware Modulator can only be restarted after the
interrupt flag has been cleared. The interrupt flag is
cleared by writing a logic 1 to the Rint bit in the Hardware
Modulator Control Register.
The time delay between two pulse trains is determined by
software.
handbook, full pagewidth
MBE346
internal bus (IB0 to 7)
CONTROL LOGIC
EXDI
DXWR
DXALE
PULSE COUNTER
HIGH
(2)
PULSE TIMER
(8)
PULSE COUNTER
LOW
(8)
OFF-TIME
REGISTER
(8)
ON-TIME
REGISTER
(8)
CONTROL
REGISTER
(5)
fosc
ILOUT
Fig.14 Block diagram of the Hardware Modulator.
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