參數(shù)資料
型號： PC48F4400P0VB00
廠商： INTEL CORP
元件分類： PROM
英文描述： Intel StrataFlash Embedded Memory
中文描述： 32M X 16 FLASH 1.8V PROM, 88 ns, PBGA64
封裝： LEAD FREE, BGA-64
文件頁數(shù)： 66/102頁
文件大?。?/td> 1609K
代理商： PC48F4400P0VB00
1-Gbit P30 Family
April 2005
66
Intel StrataFlash
Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
When a programming operation is executing, issuing the Program Suspend command requests the
WSM to suspend the programming algorithm at predetermined points. The device continues to
output Status Register data after the Program Suspend command is issued. Programming is
suspended when Status Register bits SR[7,2] are set. Suspend latency is specified in
Section 7.5,
“Program and Erase Characteristics” on page 45
.
To read data from the device, the Read Array command must be issued. Read Array, Read Status
Register, Read Device Identifier, CFI Query, and Program Resume are valid commands during a
program suspend.
During a program suspend, deasserting CE# places the device in standby, reducing active current.
V
PP
must remain at its programming level, and WP# must remain unchanged while in program
suspend. If RST# is asserted, the device is reset.
11.5
Program Resume
The Resume command instructs the device to continue programming, and automatically clears
Status Register bits SR[7,2]. This command can be written to any address. If error bits are set, the
Status Register should be cleared before issuing the next instruction. RST# must remain deasserted
(see
Figure 41, “Program Suspend/Resume Flowchart” on page 86
).
11.6
Program Protection
When V
PP
= V
IL
, absolute hardware write protection is provided for all device blocks. If V
PP
is at
or below V
PPLK
, programming operations halt and SR[3] is set indicating a V
PP
-level error. Block
lock registers are not affected by the voltage level on V
PP
; they may still be programmed and read,
even if V
PP
is less than V
PPLK
.
Figure 31.
Example VPP Supply Connections
Factory Programming with
V
PP
= V
PPH
Complete write/Erase Protection when
V
PP
≤
V
PPLK
VCC
VPP
VCC
VPP
Low Voltage and Factory Programming
Low-voltage Programming only
Logic Control of Device Protection
VCC
VPP
Low Voltage Programming Only
Full Device Protection Unavailable
VCC
VPP
≤
10K
V
PP
V
CC
V
CC
PROT #
V
CC
V
PP
=V
PPH
V
CC
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PC48F4400P0VB00A 功能描述:IC FLASH 512MBIT 85NS 64EZBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:StrataFlash™ 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標(biāo)準(zhǔn)包裝:136 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步，DDR II 存儲容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ
PC48F4400P0VB00B 功能描述:IC FLASH 512MBIT 85NS 64EZBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:StrataFlash™ 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標(biāo)準(zhǔn)包裝:136 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步，DDR II 存儲容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ
PC48F4400P0VB02E 制造商:Micron Technology Inc 功能描述:PC48F4400P0VB02E - Trays 制造商:Micron Technology Inc 功能描述:IC FLASH 512MBIT 85NS TBGA
PC48F4400P0VB02F 制造商:Micron Technology Inc 功能描述:PC48F4400P0VB02F - Tape and Reel
PC48F4400P0VB0E 制造商:MICRON 制造商全稱:Micron Technology 功能描述:Micron Parallel NOR Flash Embedded Memory (P30-65nm)
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