參數(shù)資料
型號(hào): PC33887DH/R2
廠商: MOTOROLA INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: BRUSH DC MOTOR CONTROLLER, 6 A, PDSO20
封裝: PLASTIC, HSOP-20
文件頁數(shù): 8/24頁
文件大小: 412K
代理商: PC33887DH/R2
33887
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
16
SYSTEM/APPLICATION INFORMATION
INTRODUCTION
Numerous protection and operational features (speed,
torque, direction, dynamic breaking, PWM control, and closed-
loop control), in addition to the 5.2 A rms output current
capability, make the 33887 a very attractive, cost-effective
solution for controlling a broad range of small DC motors. In
addition, a pair of 33887 devices can be used to control bipolar
stepper motors. The 33887 can also be used to excite
transformer primary windings with a switched square wave to
produce secondary winding AC currents.
As shown in Figure 1, Internal Block Diagram, the 33887 is a
fully protected monolithic H-Bridge with Enable, Fault Status
reporting, and High-Side current sense feedback to
accommodate closed-loop PWM control. For a DC motor to run,
the input conditions need be as follows: Enable input logic
HIGH, D1 input logic LOW, D2 input logic HIGH, FS flag cleared
(logic HIGH), one IN logic LOW and the other IN logic HIGH (to
define output polarity). The 33887 can execute Dynamic
Breaking by simultaneously turning on either both High-Side
MOSFETs or both Low-Side MOSFETs in the output H-Bridge;
e.g., IN1 and IN2 logic HIGH or IN1 and IN2 logic LOW.
The 33887 outputs are capable of providing a continuous DC
load current of 5.2 A from a 30 V VPWR source. An internal
charge pump supports PWM frequencies to 20 kHz. An external
pull-up resistor is required at the FS pin for fault status
reporting. The 33887 has an analog feedback (current mirror)
output pin (the FB pin) that provides a constant-current source
ratioed to the active high-side MOSFET. This can be used to
provide “real time” monitoring of output current to facilitate
closed-loop operation for motor speed/torque control.
Two independent inputs (IN1 and IN2) provide control of the
two totem-pole half-bridge outputs. Two disable inputs (D1 and
D2) provide the means to force the H-Bridge outputs to a high
impedance state (all H-Bridge switches OFF). An EN pin
controls an enable function that allows the 33887 to be placed
in a power-conserving sleep mode.
The 33887 has Undervoltage Shutdown with automatic
recovery, Output Current Limiting, Output Short-Circuit Latch-
OFF, and Overtemperature Latch-OFF. An Undervoltage
Shutdown, Output Short-Circuit Latch-OFF, or
Overtemperature Latch-OFF fault condition will cause the
outputs to turn OFF (i.e., become high impedance or tristated)
and the fault output flag to be set LOW. Either of the Disable
inputs or VPWR must be “toggled” to clear the fault flag.
Current limiting is accomplished by a constant-off-time PWM
method employing current limit threshold triggering. The current
limiting scheme is unique in that it incorporates a junction-
temperature dependent current-limit threshold. This means the
current limit threshold is “ramped down” as the junction
temperature increases above 160
°C, until at 175°C the output
current will have been decreased to about 2.5 A. Above 175
°C,
the Overtemperature Shutdown (Latch-OFF) occurs. This
combination of features allows the device to remain in operation
for a longer period of time with unexpected loads, while still
retaining adequate protection for both the device and the load.
FUNCTIONAL PIN DESCRIPTION
PGND and AGND
Power and analog ground pins. The power and analog
ground pins should be connected together with a very low
impedance connection.
VPWR
VPWR pins are the power supply inputs to the device. All
VPWR pins must be connected together on the printed circuit
board with as short as possible traces offering as low
impedance as possible between pins.
VPWR pins have an undervoltage threshold. If the supply
voltage drops below a VPWR undervoltage threshold, the output
power stage switches to a tristate condition and the fault status
flag is SET and the Fault Status pin voltage switched to a logic
LOW. When the supply voltage returns to a level that is above
the threshold, the power stage automatically resumes normal
operation according to the established condition of the input
pins and the fault status flag is automatically reset logic HIGH.
Fault Status (FS)
This pin is the device fault status output. This output is an
active LOW open drain structure requiring a pull-up resistor to
5.0 V. Refer to Table 1, Truth Table, page 15.
IN1, IN2, D1, D2
These pins are input control pins used to control the outputs.
These pins are 5.0 V CMOS-compatible inputs with hysteresis.
The IN1 and IN2 independently control OUT1 and OUT2,
respectively. D1 and D2 are complementary inputs used to
tristate disable the H-Bridge outputs.
When either D1 or D2 is SET (D1 = logic HIGH or D2 = logic
LOW) in the disable state, outputs OUT1 and OUT2 are both
tristate disabled; however, the rest of the device circuitry is fully
operational and the supply IPWR(standby) current is reduced to a
few milli-amperes. Refer to Table 1, Truth Table, and STATIC
ELECTRICAL CHARACTERISTICS table.
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