參數(shù)資料
型號: PA7540SI-15
英文描述: PA7540 PEEL Array? Programmable Electrically Erasable Logic Array
中文描述: PA7540果皮陣列?電可擦除可編程邏輯陣列
文件頁數(shù): 10/10頁
文件大小: 239K
代理商: PA7540SI-15
10
04-02-051B
Table 6. Ordering Information
Part Number
PA7540P-15
PA7540J-15
PA7540JN-15
PA7540S-15
PA7540PI-15
PA7540JI-15
PA7540JNI-15
PA7540SI-15
Speed
Temperature
Package
P24
J28
JN28
S24
P24
J28
JN28
S24
10/15ns
C
10/15ns
I
Figure 16. Part Number
Device Suffix
PA7540J-15
Package
P = 300mil DIP
J = Plastic (J) Leaded Chip Carrier (PLCC)
JN = PLCC Alternate Pin Out
S = SOIC 300 mil Gullwing
Speed
-15 = 10ns/15ns tpd/tpdx
Temperature Range
(Blank) = Commercial 0 to 70° C
I = Industrial -40 to +85° C
08-14--016A
Anachip USA, Inc.
780 Montague Expressway, #201
San Jose, CA 95131
TEL (408) 321-9600
FAX (408) 321-9696
2002 Anachip Corp.
Anachip reserves the right to make changes in specifications at any time and without notice. The information furnished by
Anachip in this publication is believed to be accurate and reliable. However, there is no responsibility assumed by Anachip
for its use nor for any infringements of patents or other rights of third parties resulting from its use. No license is granted
under any patents or patent rights of Anachip. Anachip’s products are not authorized for use as critical components in life
support devices or systems.
Marks bearing
or are registered trademarks and trademarks of Anachip Corp.
Email:
Sales_usa@anachip.com
Website:
http://www.anachip.com
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