- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369945 > PA28F008SC-120 (INTEL CORP) BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT PDF資料下載
參數(shù)資料
| 型號(hào)： | PA28F008SC-120 |
| 廠商： | INTEL CORP |
| 元件分類： | PROM |
| 英文描述： | BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT |
| 中文描述： | 1M X 8 FLASH 3.3V PROM, 120 ns, PDSO44 |
| 封裝： | 13.30 X 28.20 MM, PLASTIC, SOP-44 |
| 文件頁數(shù)： | 18/33頁 |
| 文件大?。?/td> | 466K |
| 代理商： | PA28F008SC-120 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當(dāng)前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁
28F008SA
V
CC
, V
PP
, RP
Y
Transitions and the
Command/Status Registers
Byte write and block erase completion are not guar-
anteed if V
PP
drops below V
PPH
. If the V
PP
Status bit
of the Status Register (SR.3) is set to ‘‘1’’, a Clear
Status Register command MUST be issued before
further byte write/block erase attempts are allowed
by the WSM. Otherwise, the Byte Write (SR.4) or
Erase (SR.5) Status bits of the Status Register will
be set to ‘‘1’’s if error is detected. RP
Y
transitions to
V
IL
during byte write and block erase also abort the
operations. Data is partially altered in either case,
and the command sequence must be repeated after
normal operation is restored. Device poweroff, or
RP
Y
transitions to V
IL
, clear the Status Register to
initial value 10000 for the upper 5 bits.
The Command User Interface latches commands as
issued by system software and is not altered by V
PP
or CE
Y
transitions or WSM actions. Its state upon
powerup, after exit from deep powerdown or after
V
CC
transitions below V
LKO
, is Read Array Mode.
After byte write or block erase is complete, even
after V
PP
transitions down to V
PPL
, the Command
User Interface must be reset to Read Array mode via
the Read Array command if access to the memory
array is desired.
Power Up/Down Protection
The 28F008SA is designed to offer protection
against accidental block erasure or byte writing dur-
ing
power
transitions.
28F008SA is indifferent as to which power supply,
V
PP
or V
CC
, powers up first. Power supply sequenc-
ing is not required. Internal circuitry in the 28F008SA
Upon
power-up,
the
ensures that the Command User Interface is reset to
the Read Array mode on power up.
A system designer must guard against spurious
writes for V
CC
voltages above V
LKO
when V
PP
is
active. Since both WE
Y
and CE
Y
must be low for a
command write, driving either to V
IH
will inhibit
writes. The Command User Interface architecture
provides an added level of protection since altera-
tion of memory contents only occurs after success-
ful completion of the two-step command sequences.
Finally, the device is disabled until RP
Y
is brought to
V
IH
, regardless of the state of its control inputs. This
provides an additional level of memory protection.
Power Dissipation
When designing portable systems, designers must
consider battery power consumption not only during
device operation, but also for data retention during
system idle time. Flash nonvolatility increases us-
able battery life, because the 28F008SA does not
consume any power to retain code or data when the
system is off.
In addition, the 28F008SA’s deep powerdown mode
ensures extremely low power dissipation even when
system power is applied. For example, portable PCs
and other power sensitive applications, using an ar-
ray of 28F008SAs for solid-state storage, can lower
RP
Y
to V
IL
in standby or sleep modes, producing
negligable power consumption. If access to the
28F008SA is again needed, the part can again be
read, following the t
PHQV
and t
PHWL
wakeup cycles
required after RP
Y
is first raised back to V
IH
. See
AC CharacteristicsDRead-Only and Write Opera-
tions and Figures 10 and 11 for more information.
18
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PA34 | POWER OPERATIONAL AMPLIFIERS |
| PA44 | HIGH VOLTAGE POWER OPERATIONAL AMPLIFIER |
| PA7540JI-15 | PA7540 PEEL Array? Programmable Electrically Erasable Logic Array |
| PA7540JN-15 | PA7540 PEEL Array? Programmable Electrically Erasable Logic Array |
| PA7540JNI-15 | PA7540 PEEL Array? Programmable Electrically Erasable Logic Array |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PA28F008SC-85 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:BYTE-WIDE SmartVoltage FlashFile⑩ MEMORY FAMILY 4, 8, AND 16 MBIT |
| PA28F016S5-120 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT |
| PA28F016S5-95 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT |
| PA28F016SC-120 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:BYTE-WIDE SmartVoltage FlashFile⑩ MEMORY FAMILY 4, 8, AND 16 MBIT |
| PA28F016SC-95 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:BYTE-WIDE SmartVoltage FlashFile⑩ MEMORY FAMILY 4, 8, AND 16 MBIT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。