1997 Mar 14
34
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART, I
2
C-bus and ADC
P80CL580; P83CL580
16.2
Serial Port Control and Status Register (S0CON)
The Serial Port Control and Status Register is the Special Function Register S0CON. The register contains not only the
mode selection bits, but also the 9
th
data bit for transmit and receive (TB8 and RB8), and the serial port interrupt bits
(TI and RI).
Table 30
Serial Port Control Register (address 98H)
Table 31
Description of S0CON bits
Table 32
Selection of the serial port modes
7
6
5
4
3
2
1
0
SMO
SM1
SM2
REN
TB8
RB8
TI
RI
BIT
SYMBOL
DESCRIPTION
7
6
5
SM0
SM1
SM2
These bits are used to select the serial port mode; see Table 32.
Enables the multiprocessor communication feature in Modes 2 and 3. In these modes,
if SM2 = 1, then RI will not be activated if the received 9
th
data bit (RB8) is a logic 0.
In Mode 1, if SM2 = 1, then RI will not be activated unless a valid stop bit was received.
In Mode 0, SM2 should be a logic 0.
Enables serial reception and is set by software to enable reception, and cleared by
software to disable reception.
Is the 9
th
data bit that will be transmitted in Modes 2 and 3. Set or cleared by software as
desired.
In Modes 2 and 3, is the 9
th
data bit received. In Mode 1, if SM2 = 0 then RB8 is the stop
bit that was received. In Mode 0, RB8 is not used.
The transmit interrupt flag
. Set by hardware at the end of the 8
th
bit time in Mode 0, or
at the beginning of the stop bit time in the other modes, in any serial transmission. Must
be cleared by software.
The receive interrupt flag
. Set by hardware at the end of the 8
th
bit time in Mode 0, or
halfway through the stop bit time in the other modes, in any serial transmission (except
see SM2). Must be cleared by software.
4
REN
3
TB8
2
RB8
1
TI
0
RI
SMO
SM1
MODE
DESCRIPTION
BAUD RATE
0
0
1
1
0
1
0
1
Mode 0
Mode 1
Mode 2
Mode 3
Shift register
8-bit UART
9-bit UART
9-bit UART
1
12
×
f
osc
variable
1
32
or
1
64
×
f
osc
variable