參數(shù)資料
        型號(hào): P8xCL580HFH
        廠商: NXP Semiconductors N.V.
        英文描述: Low voltage 8-bit microcontrollers with UART, I2C-bus and ADC
        中文描述: 低電壓8 - UART的,位微控制器的I2C總線和ADC
        文件頁(yè)數(shù): 21/80頁(yè)
        文件大?。?/td> 366K
        代理商: P8XCL580HFH
        1997 Mar 14
        21
        Philips Semiconductors
        Product specification
        Low voltage 8-bit microcontrollers with
        UART, I
        2
        C-bus and ADC
        P80CL580; P83CL580
        12 PULSE WIDTH MODULATED OUTPUT
        One Pulse Width Modulated output channel (PWM0) is
        provided which outputs pulses of programmable length
        and interval. The repetition frequency is defined by an 8-bit
        prescaler (PWMP) that generates the clock for the
        counter. The 8-bit counter counts modulo 255, i.e. from
        0 to 254 inclusive. The value held in the 8-bit counter is
        compared to the contents of the register PWM0.
        Provided the contents of this register are greater than the
        counter value, the PWM0 output is set LOW. If the
        contents of register PWM0 are equal to, or less than the
        counter value, the PWM0 output is set HIGH.
        The pulse-width-ratio is therefore defined by the contents
        of register PWM0. The pulse-width-ratio will be in the
        range 0 to
        255
        255
        and may be programmed in increments
        of
        1
        255
        .
        The repetition frequency (f
        PWM
        ) at the PWM0 output is
        given by:
        f
        2
        {
        1
        (
        PWMP
        )
        +
        ×
        For f
        osc
        = 12 MHz the above formula gives a repetition
        frequency range of 92 Hz to 23.5 kHz.
        By loading the PWM0 register with either 00H or FFH, the
        PWM0 output can be retained at a constant HIGH or LOW
        level respectively. When loading FFH into the PWM0
        register, the 8-bit counter will never actually reach this
        value.
        The PWM0 output pin is driven by push-pull drivers and is
        not shared with any other function.
        f
        PWM
        255
        }
        ×
        ----------------------------------------------------------------------------
        =
        12.1
        Prescaler Frequency Control Register (PWMP)
        Table 5
        Prescaler Frequency Control Register (address FEH)
        Table 6
        Description of PWMP bits
        12.2
        Pulse Width Register (PWM0)
        Table 7
        Pulse Width Register (address FCH)
        Table 8
        Description of PWM0 bits
        7
        6
        5
        4
        3
        2
        1
        0
        PWMP.7
        PWMP.6
        PWMP.5
        PWMP.4
        PWMP.3
        PWMP.2
        PWMP.1
        PWMP.0
        BIT
        SYMBOL
        DESCRIPTION
        7 to 1
        PWMP.7 to PWMP.0
        Prescaler division factor = (PWMP) + 1.
        7
        6
        5
        4
        3
        2
        1
        0
        PWM0.7
        PWM0.6
        PWM0.5
        PWM0.4
        PWM0.3
        PWM0.2
        PWM0.1
        PWM0.0
        BIT
        SYMBOL
        DESCRIPTION
        7 to 1
        PWM0.7 to PWM0.0
        LOW/HIGH ratio of PWM0 signal
        )
        }
        ---255
        =
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