參數(shù)資料
型號(hào): P89V52X2FN,112
廠商: NXP Semiconductors
文件頁(yè)數(shù): 54/57頁(yè)
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 40-DIP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 216
系列: 89V
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: UART/USART
外圍設(shè)備: POR
輸入/輸出數(shù): 32
程序存儲(chǔ)器容量: 8KB(8K x 8)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 192 x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
配用: 622-1017-ND - BOARD 44-ZIF PLCC SOCKET
622-1012-ND - BOARD FOR P89V52X2 44-TQFP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
其它名稱: 568-4251-5
935282526112
P89V52X2FN
P89V52X2_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 4 May 2009
6 of 57
NXP Semiconductors
P89V52X2
80C51 with 256 B RAM, 192 B data EEPROM
P1[7]
8
3
9
I/O
P1[7] — Port 1 bit 7.
P2[0] to P2[7]
I/O with
internal
pull-up
Port 2: Port 2 is an 8-bit bidirectional I/O port with internal
pull-ups. Port 2 pins are pulled HIGH by the internal
pull-ups when ‘1’s are written to them and can be used as
inputs in this state. As inputs, Port 2 pins that are
externally pulled LOW will source current (IIL) because of
the internal pull-ups. Port 2 sends the high-order address
byte during fetches from external program memory and
during accesses to external Data Memory that use 16-bit
address (MOVX@DPTR). In this application, it uses strong
internal pull-ups when transitioning to ‘1’s.
P2[0]/A8
21
18
24
I/O
P2[0] — Port 2 bit 0.
O
A8 — Address bit 8.
P2[1]/A9
22
19
25
I/O
P2[1] — Port 2 bit 1.
O
A9 — Address bit 9.
P2[2]/A10
23
20
26
I/O
P2[2] — Port 2 bit 2.
O
A10 — Address bit 10.
P2[3]/A11
24
21
27
I/O
P2[3] — Port 2 bit 3.
O
A11 — Address bit 11.
P2[4]/A12
25
22
28
I/O
P2[4] — Port 2 bit 4.
O
A12 — Address bit 12.
P2[5]/A13
26
23
29
I/O
P2[5] — Port 2 bit 5.
O
A13 — Address bit 13.
P2[6]/A14
27
24
30
I/O
P2[6] — Port 2 bit 6.
O
A14 — Address bit 14.
P2[7]/A15
28
25
31
I/O
P2[7] — Port 2 bit 7.
O
A15 — Address bit 15.
P3[0] to P3[7]
I/O
with
internal
pull-up
Port 3: Port 3 is an 8-bit bidirectional I/O port with internal
pull-ups. Port 3 pins are pulled HIGH by the internal
pull-ups when ‘1’s are written to them and can be used as
inputs in this state. As inputs, Port 3 pins that are
externally pulled LOW will source current (IIL) because of
the internal pull-ups.
P3[0]/RXD
10
5
11
I
P3[0] — Port 3 bit 0.
I
RXD — Serial input port.
P3[1]/TXD
11
7
13
O
P3[1] — Port 3 bit 1.
O
TXD — Serial output port.
P3[2]/INT0
12
8
14
I
P3[2] — Port 3 bit 2.
I
INT0 — External interrupt 0 input.
P3[3]/INT1
13
9
15
I
P3[3] — Port 3 bit 3.
I
INT1 — External interrupt 1 input
P3[4]/T0
14
10
16
I/O
P3[4] — Port 3 bit 4.
I
T0 — External count input to Timer/Counter 0.
Table 2.
Pin description …continued
Symbol
Pin
Type
Description
DIP40
LQFP44
PLCC44
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