參數(shù)資料
型號: P89V51RC2FA,512
廠商: NXP Semiconductors
文件頁數(shù): 65/80頁
文件大小: 0K
描述: IC 80C51 MCU FLASH 32K 44-PLCC
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標準包裝: 26
系列: 89V
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
產(chǎn)品目錄頁面: 706 (CN2011-ZH PDF)
配用: 622-1017-ND - BOARD 44-ZIF PLCC SOCKET
622-1001-ND - USB IN-CIRCUIT PROG 80C51ISP
其它名稱: 568-2428-5
935277727512
P89V51RC2FA
PIC18F87K22 FAMILY
DS39960D-page 68
2009-2011 Microchip Technology Inc.
REGISTER 4-4:
PMD0: PERIPHERAL MODULE DISABLE REGISTER 0
R/W-0
CCP3MD
CCP2MD
CCP1MD
UART2MD
UART1MD
SSP2MD
SSP1MD
ADCMD
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
CCP3MD:
PMD ECCP3 Enable/Disable bit
1
= Peripheral Module Disable (PMD) is enabled for ECCP3, disabling all of its clock sources
0
= PMD is disabled for ECCP3
bit 6
CCP2MD:
PMD ECCP2 Enable/Disable bit
1
= PMD is enabled for ECCP2, disabling all of its clock sources
0
= PMD is disabled for ECCP2
bit 5
CCP1MD:
PMD ECCP1 Enable/Disable bit
1
= PMD is enabled for ECCP1, disabling all of its clock sources
0
= PMD is disabled for ECCP1
bit 4
UART2MD:
PMD UART2 Enable/Disable bit
1
= PMD is enabled for UART2, disabling all of its clock sources
0
= PMD is disabled for UART2
bit 3
UART1MD:
PMD UART1 Enable/Disable bit
1
= PMD is enabled for UART1, disabling all of its clock sources
0
= PMD is disabled for UART1
bit 2
SSP2MD:
PMD MSSP2 Enable/Disable bit
1
= PMD is enabled for MSSP2, disabling all of its clock sources
0
= PMD is disabled for MSSP2
bit 1
SSP1MD:
PMD MSSP1 Enable/Disable bit
1
= PMD is enabled for MSSP1, disabling all of its clock sources
0
= PMD is disabled for MSSP1
bit 0
ADCMD:
PMD Analog/Digital Converter PMD Enable/Disable bit
1
= PMD is enabled for the Analog/Digital Converter, disabling all of its clock sources
0
= PMD is disabled for the Analog/Digital Converter
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