參數(shù)資料
型號(hào): P89V51RB2BBC,557
廠商: NXP Semiconductors
文件頁(yè)數(shù): 80/80頁(yè)
文件大小: 0K
描述: IC 80C51 MCU 1024 RAM 44TQFP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 800
系列: 89V
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器容量: 16KB(16K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 44-TQFP
包裝: 托盤
配用: 622-1017-ND - BOARD 44-ZIF PLCC SOCKET
其它名稱: 935277723557
P89V51RB2BBC
P89V51RB2BBC-ND
P89V51RB2_RC2_RD2_5
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 12 November 2009
9 of 80
NXP Semiconductors
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
[1]
ALE loading issue: When ALE pin experiences higher loading (>30 pF) during the reset, the microcontroller may accidentally enter into
modes other than normal working mode. The solution is to add a pull-up resistor of 3 k
to 50 k to V
DD, e.g., for ALE pin.
[2]
For 6-clock mode, ALE is emitted at 1
3 of crystal frequency.
RST
9
4
10
I
Reset: While the oscillator is running, a HIGH logic state
on this pin for two machine cycles will reset the device. If
the PSEN pin is driven by a HIGH-to-LOW input transition
while the RST input pin is held HIGH, the device will enter
the external host mode, otherwise the device will enter the
normal operation mode.
EA
31
29
35
I
External Access Enable: EA must be connected to VSS in
order to enable the device to fetch code from the external
program memory. EA must be strapped to VDD for internal
program execution. The EA pin can tolerate a high voltage
of 12 V.
ALE/PROG
30
27
33
I/O
Address Latch Enable: ALE is the output signal for
latching the low byte of the address during an access to
external memory. This pin is also the programming pulse
input (PROG) for ash programming. Normally the ALE[1]
is emitted at a constant rate of 1
6 the crystal frequency[2]
and can be used for external timing and clocking. One ALE
pulse is skipped during each access to external data
memory. However, if AO is set to ‘1’, ALE is disabled.
n.c.
-
6, 17, 28,
39
1, 12, 23,
34
I/O
not connected
XTAL1
19
15
21
I
Crystal 1: Input to the inverting oscillator amplier and
input to the internal clock generator circuits.
XTAL2
18
14
20
O
Crystal 2: Output from the inverting oscillator amplier.
VDD
40
38
44
I
Power supply
VSS
20
16
22
I
Ground
Table 3.
P89V51RB2/RC2/RD2 pin description …continued
Symbol
Pin
Type
Description
DIP40
TQFP44
PLCC44
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