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參數(shù)資料
| 型號： | P89LPC932BDH |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 80C51 8-bit microcontroller with two-clock core 8 KB 3 V low-power Flash with 512-byte data EEPROM |
| 中文描述： | 8-BIT, FLASH, 12 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | 4.40 MM, PLASTIC, MO-153, SOT-361-1, TSSOP-28 |
| 文件頁數(shù)： | 23/64頁 |
| 文件大?。?/td> | 316K |
| 代理商： | P89LPC932BDH |
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9397 750 14871
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 10 May 2005
23 of 64
Philips Semiconductors
P89LPC932A1
8-bit microcontroller with accelerated two-clock 80C51 core
[1]
Required for operation above 12 MHz.
7.13.1
Port configurations
All but three I/O port pins on the P89LPC932A1 may be configured by software to one of
four types on a bit-by-bit basis. These are: quasi-bidirectional (standard 80C51 port
outputs), push-pull, open drain, and input-only. Two configuration registers for each port
select the output type for each port pin.
1. P1.5 (RST) can only be an input and cannot be configured.
2. P1.2 (SCL/T0) and P1.3 (SDA/INT0) may only be configured to be either input-only or
open-drain.
7.13.1.1
Quasi-bidirectional output configuration
Quasi-bidirectional output type can be used as both an input and output without the need
to reconfigure the port. This is possible because when the port outputs a logic HIGH, it is
weakly driven, allowing an external device to pull the pin LOW. When the pin is driven
LOW, it is driven strongly and able to sink a fairly large current. These features are
somewhat similar to an open-drain output except that there are three pull-up transistors in
the quasi-bidirectional output that serve different purposes.
The P89LPC932A1 is a 3 V device, but the pins are 5 V-tolerant. In quasi-bidirectional
mode, if a user applies 5 V on the pin, there will be a current flowing from the pin to V
DD
,
causing extra power consumption. Therefore, applying 5 V in quasi-bidirectional mode is
discouraged.
A quasi-bidirectional port pin has a Schmitt trigger input that also has a glitch suppression
circuit.
7.13.1.2
Open-drain output configuration
The open-drain output configuration turns off all pull-ups and only drives the pull-down
transistor of the port driver when the port latch contains a logic 0. To be used as a logic
output, a port configured in this manner must have an external pull-up, typically a resistor
tied to V
DD
.
An open-drain port pin has a Schmitt trigger input that also has a glitch suppression
circuit.
7.13.1.3
Input-only configuration
The input-only port configuration has no output drivers. It is a Schmitt trigger input that
also has a glitch suppression circuit.
External clock input
No external reset (except during power-up)
External RST pin supported
[1]
No external reset (except during power-up)
External RST pin supported
[1]
25
24
24
23
Low/medium/high speed oscillator
(external crystal or resonator)
Table 6:
Clock source
Number of I/O pins available
…continued
Reset option
Number of I/O pins
(28-pin package)
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| P89LPC932FDH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 8 kB Flash with 512-byte data EEPROM and 768-byte RAM |
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| P89LPC932FHN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 8 kB Flash with 512-byte data EEPROM and 768-byte RAM |
| P89LPC933 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/16 kB 3 V byte-erasable flash with 8-bit ADCs |
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