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參數(shù)資料
| 型號： | P89LPC932A1FA,112 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 37/64頁 |
| 文件大小： | 0K |
| 描述： | IC 80C51 MCU FLASH 8K 28-PLCC |
| 產品培訓模塊： | Migrating from 8/16-Bit MCUs to 32-Bit ARMs |
| 標準包裝： | 37 |
| 系列： | LPC900 |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 18MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設備： | 欠壓檢測/復位，LED，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 26 |
| 程序存儲器容量： | 8KB（8K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 768 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.4 V ~ 3.6 V |
| 振蕩器型： | 內部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 28-PLCC |
| 包裝： | 管件 |
| 產品目錄頁面： | 706 (CN2011-ZH PDF) |
| 配用： | DB-TSSOP-LPC932-ND - BOARD FOR LPC932 TSSOP 622-1014-ND - BOARD FOR LPC9XX TSSOP 622-1008-ND - BOARD FOR LPC9103 10-HVSON 622-1006-ND - SOCKET ADAPTER BOARD 568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART 568-3510-ND - DEMO BOARD SPI/I2C TO UART 622-1003-ND - KIT FOR LCD DEMO 622-1002-ND - USB IN-CIRCUIT PROG LPC9XX 568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X 568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY |
| 其它名稱： | 568-4279-5 935276131112 P89LPC932A1FA |
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P89LPC932A1_3
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 March 2007
42 of 64
NXP Semiconductors
P89LPC932A1
8-bit microcontroller with accelerated two-clock 80C51 core
7.28.3 Flash organization
The program memory consists of eight 1 kB sectors on the P89LPC932A1 device. Each
sector can be further divided into 64-byte pages. In addition to sector erase, page erase,
and byte erase, a 64-byte page register is included which allows from 1 byte to 64 bytes of
a given page to be programmed at the same time, substantially reducing overall
programming time.
7.28.4 Using ash as data storage
The ash code memory array of this device supports individual byte erasing and
programming. Any byte in the code memory array may be read using the MOVC
instruction, provided that the sector containing the byte has not been secured (a MOVC
instruction is not allowed to read code memory contents of a secured sector). Thus any
byte in a non-secured sector may be used for non-volatile data storage.
7.28.5 Flash programming and erasing
Four different methods of erasing or programming of the ash are available. The ash may
be programmed or erased in the end-user application (IAP) under control of the
application’s rmware. Another option is to use the ICP mechanism. This ICP system
provides for programming through a serial clock - serial data interface. As shipped from
the factory, the upper 512 bytes of user code space contains a serial ISP routine allowing
for the device to be programmed in circuit through the serial port. The ash may also be
programmed or erased using a commercially available EPROM programmer which
supports this device. This device does not provide for direct verication of code memory
contents. Instead, this device provides a 32-bit CRC result on either a sector or the entire
user code space.
7.28.6 In-circuit programming
ICP is performed without removing the microcontroller from the system. The ICP facility
consists of internal hardware resources to facilitate remote programming of the
P89LPC932A1 through a two-wire serial interface. The ICP facility has made ICP in an
embedded application—using commercially available programmers—possible with a
minimum of additional expense in components and circuit board area. The ICP function
uses ve pins. Only a small connector needs to be available to interface your application
to a commercial programmer in order to use this feature. Additional details may be found
in the P89LPC932A1
User manual.
7.28.7 In-application programming
IAP is performed in the application under the control of the microcontroller’s rmware. The
IAP facility consists of internal hardware resources to facilitate programming and erasing.
The IAP facility has made IAP in an embedded application possible without additional
components. Two methods are available to accomplish IAP. A set of predened IAP
functions are provided in a Boot ROM and can be called through a common interface,
PGM_MTP. Several IAP calls are available for use by an application program to permit
selective erasing and programming of ash sectors, pages, security bits, conguration
bytes, and device ID. These functions are selected by setting up the microcontroller’s
registers before making a call to PGM_MTP at FF00H. The Boot ROM occupies the
program memory space at the top of the address space from FF00H to FEFFH, thereby
not conicting with the user program memory space.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| P89LPC932A1FDH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM |
| P89LPC932A1FDH,512 | 功能描述:8位微控制器 -MCU 80C51 8K FL 768B RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P89LPC932A1FDH,529 | 功能描述:8位微控制器 -MCU 8K FL/768B RAM/512B EE/CCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P89LPC932A1FDH512 | 制造商:NXP Semiconductors 功能描述:IC 8BIT MCU 80C51 18MHZ TSSOP-28 |
| P89LPC932A1FHN | 制造商:NXP Semiconductors 功能描述:MCU 8BIT 80C51 8K FLASH HVQFN-28 |
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