參數(shù)資料
型號(hào): P89LPC924FDH
廠商: NXP Semiconductors N.V.
元件分類: 8位微控制器
英文描述: 8-bit microcontrollers with accelerated two-clock 80C51 core 4 kB-8 kB 3 V low-power Flash with 8-bit A-D converter
封裝: P89LPC924FDH<SOT360-1 (TSSOP20)|<<http://www.nxp.com/packages/SOT360-1.html<1<Always Pb-free,;P89LPC925FDH<SOT360-1 (TSSOP20)|<<http://www.nxp.com/packages/SOT360-1.html&
文件頁(yè)數(shù): 22/49頁(yè)
文件大?。?/td> 233K
代理商: P89LPC924FDH
Philips Semiconductors
P89LPC924/925
8-bit microcontrollers with accelerated two-clock 80C51 core
Product data
Rev. 03 — 15 December 2004
29 of 49
9397 750 14471
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.19.1
Mode 0
Serial data enters and exits through RxD. TxD outputs the shift clock. 8 bits are
transmitted or received, LSB rst. The baud rate is xed at 1
16 of the CPU clock
frequency.
8.19.2
Mode 1
10 bits are transmitted (through TxD) or received (through RxD): a start bit
(logical ‘0’), 8 data bits (LSB rst), and a stop bit (logical ‘1’). When data is received,
the stop bit is stored in RB8 in Special Function Register SCON. The baud rate is
variable and is determined by the Timer 1 overow rate or the Baud Rate Generator
8.19.3
Mode 2
11 bits are transmitted (through TxD) or received (through RxD): start bit (logical ‘0’),
8 data bits (LSB rst), a programmable 9th data bit, and a stop bit (logical ‘1’). When
data is transmitted, the 9th data bit (TB8 in SCON) can be assigned the value of ‘0’ or
‘1’. Or, for example, the parity bit (P, in the PSW) could be moved into TB8. When
data is received, the 9th data bit goes into RB8 in Special Function Register SCON,
while the stop bit is not saved. The baud rate is programmable to either 1
16 or
1
32 of
the CPU clock frequency, as determined by the SMOD1 bit in PCON.
8.19.4
Mode 3
11 bits are transmitted (through TxD) or received (through RxD): a start bit
(logical ‘0’), 8 data bits (LSB rst), a programmable 9th data bit, and a stop bit
(logical ‘1’). In fact, Mode 3 is the same as Mode 2 in all respects except baud rate.
The baud rate in Mode 3 is variable and is determined by the Timer 1 overow rate or
the Baud Rate Generator (described in Section 8.19.5 “Baud rate generator and
8.19.5
Baud rate generator and selection
The P89LPC924/925 enhanced UART has an independent Baud Rate Generator.
The baud rate is determined by a baud-rate preprogrammed into the BRGR1 and
BRGR0 SFRs which together form a 16-bit baud rate divisor value that works in a
similar manner as Timer 1 but is much more accurate. If the baud rate generator is
used, Timer 1 can be used for other timing functions.
The UART can use either Timer 1 or the baud rate generator output (see Figure 7).
Note that Timer T1 is further divided by 2 if the SMOD1 bit (PCON.7) is set. The
independent Baud Rate Generator uses OSCCLK.
Fig 7.
Baud rate sources for UART (Modes 1, 3).
Baud Rate Modes 1 and 3
SBRGS = 1
SBRGS = 0
SMOD1 = 0
SMOD1 = 1
2
Timer 1 Overflow
(PCLK-based)
Baud Rate Generator
(CCLK-based)
002aaa419
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P89LPC925FDH 8-bit microcontrollers with accelerated two-clock 80C51 core 4 kB-8 kB 3 V low-power Flash with 8-bit A-D converter
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