參數(shù)資料
型號(hào): P89LPC924
廠(chǎng)商: NXP Semiconductors N.V.
英文描述: 8-bit microcontrollers with accelerated two-clock 80C51 core 4 kB/8 kB 3 V low-power Flash with 8-bit A/D converter
中文描述: 8 -加速雙位單片機(jī)80C51的時(shí)鐘4 KB的核心/ 8 KB的3伏的低功耗Flash 8位A / D轉(zhuǎn)換器
文件頁(yè)數(shù): 7/49頁(yè)
文件大?。?/td> 233K
代理商: P89LPC924
Philips Semiconductors
P89LPC924/925
8-bit microcontrollers with accelerated two-clock 80C51 core
Product data
Rev. 03 — 15 December 2004
7 of 49
9397 750 14471
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P1.0 - P1.7
12, 11, 10,
9, 8, 4, 3,
2
I/O, I
[1]
Port 1:
Port 1 is an 8-bit I/O port with a user-configurable output type, except for three
pins as noted below. During reset Port 1 latches are configured in the input only mode
with the internal pull-up disabled. The operation of the configurable Port 1 pins as inputs
and outputs depends upon the port configuration selected. Each of the configurable
port pins are programmed independently. Refer to
Section 8.13.1 “Port configurations”
and
Table 8 “DC electrical characteristics”
for details. P1.2 - P1.3 are open drain when
used as outputs. P1.5 is input only.
All pins have Schmitt triggered inputs.
Port 1 also provides various special functions as described below:
I/O
P1.0 —
Port 1 bit 0.
O
TXD —
Transmitter output for the serial port.
I/O
P1.1 —
Port 1 bit 1.
I
RXD —
Receiver input for the serial port.
I/O
P1.2 —
Port 1 bit 2 (open-drain when used as output).
I/O
T0 —
Timer/counter 0 external count input or overflow output (open-drain when used as
output).
I/O
SCL —
I
2
C serial clock input/output.
I/O
P1.3 —
Port 1 bit 3 (open-drain when used as output).
I
INT0 —
External interrupt 0 input.
I/O
SDA —
I
2
C serial data input/output.
I/O
P1.4 —
Port 1 bit 4.
I
INT1 —
External interrupt 1 input.
I
P1.5 —
Port 1 bit 5 (input only).
I
RST —
External Reset input (if selected via FLASH configuration). A LOW on this pin
resets the microcontroller, causing I/O ports and peripherals to take on their default
states, and the processor begins execution at address 0.
When using an oscillator
frequency above 12 MHz, the reset input function of P1.5 must be enabled. An
external circuit is required to hold the device in reset at power-up until V
DD
has
reached its specified level. When system power is removed V
DD
will fall below the
minimum specified operating voltage. When using an oscillator frequency above
12 MHz, in some applications, an external brownout detect circuit may be
required to hold the device in reset when V
DD
falls below the minimum specified
operating voltage.
I/O
P1.6 —
Port 1 bit 6.
I/O
P1.7 —
Port 1 bit 7.
12
11
10
9
8
4
3
2
Table 3:
Symbol
Pin description
…continued
Pin
Type
Description
相關(guān)PDF資料
PDF描述
P89LPC925 8-bit microcontrollers with accelerated two-clock 80C51 core 4 kB/8 kB 3 V low-power Flash with 8-bit A/D converter
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