參數(shù)資料
型號(hào): P89LPC9241FDH
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-bit microcontroller with accelerated two-clock 80C51 core 2 kB-4 kB-8 kB 3 V byte-erasable flash with 8-bit ADC
中文描述: MICROCONTROLLER, PDSO20
封裝: 4.40 MM, PLASTIC, MO-153, SOT360-1, TSSOP-20
文件頁(yè)數(shù): 27/75頁(yè)
文件大?。?/td> 1612K
代理商: P89LPC9241FDH
P89LPC92X1
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 1 December 2010
33 of 75
NXP Semiconductors
P89LPC9201/9211/922A1/9241/
8-bit microcontroller with 8-bit ADC
An open-drain port pin has a Schmitt trigger input that also has a glitch suppression
circuit.
7.16.1.3
Input-only configuration
The input-only port configuration has no output drivers. It is a Schmitt trigger input that
also has a glitch suppression circuit.
7.16.1.4
Push-pull output configuration
The push-pull output configuration has the same pull-down structure as both the
open-drain and the quasi-bidirectional output modes, but provides a continuous strong
pull-up when the port latch contains a logic 1. The push-pull mode may be used when
more source current is needed from a port output. A push-pull port pin has a
Schmitt triggered input that also has a glitch suppression circuit. The
P89LPC9201/9211/922A1/9241/9251 device has high current source on eight pins in
7.16.2 Port 0 analog functions
The P89LPC9201/9211/922A1/9241/9251 incorporates two Analog Comparators. In order
to give the best analog function performance and to minimize power consumption, pins
that are being used for analog functions must have the digital outputs and digital inputs
disabled.
Digital outputs are disabled by putting the port output into the Input-Only
(high-impedance) mode.
Digital inputs on Port 0 may be disabled through the use of the PT0AD register, bits 1:5.
On any reset, PT0AD[1:5] defaults to logic 0s to enable digital functions.
7.16.3 Additional port features
After power-up, all pins are in Input-Only mode. Please note that this is different from
the LPC76x series of devices.
After power-up, all I/O pins except P1.5, may be configured by software.
Pin P1.5 is input only. Pins P1.2 and P1.3 are configurable for either input-only or
open-drain.
Every output on the P89LPC9201/9211/922A1/9241/9251 has been designed to sink
typical LED drive current. However, there is a maximum total output current for all ports
which must not be exceeded. Please refer to Table 12 “Static characteristics” for detailed
specifications.
All ports pins that can function as an output have slew rate controlled outputs to limit noise
generated by quickly switching output signals. The slew rate is factory-set to
approximately 10 ns rise and fall times.
7.17 Power monitoring functions
The P89LPC9201/9211/922A1/9241/9251 incorporates power monitoring functions
designed to prevent incorrect operation during initial power-up and power loss or
reduction during operation. This is accomplished with two hardware functions: Power-on
detect and brownout detect.
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