參數(shù)資料
型號(hào)： P89LPC912
廠商： NXP Semiconductors N.V.
英文描述： 8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM
中文描述： 8位微控制器兩個(gè)小時(shí)80C51的核心具有1KB 3伏閃光的128字節(jié)RAM
文件頁(yè)數(shù)： 63/63頁(yè)
文件大?。?/td> 314K
代理商： P89LPC912
Koninklijke Philips Electronics N.V. 2004.
Printed in the U.S.A.
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 17 December 2004
Document order number: 9397 750 14468
Contents
Philips Semiconductors
P89LPC912/913/914
8-bit microcontrollers with two-clock 80C51 core
1
2
3
4
4.1
5
6
6.1
6.2
7
7.1
8
9
9.1
9.2
9.2.1
9.2.2
9.2.3
General description. . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Additional features . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinning information. . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pinning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Product comparison. . . . . . . . . . . . . . . . . . . . . . . . . 15
Special function registers. . . . . . . . . . . . . . . . . . . . . 15
Functional description . . . . . . . . . . . . . . . . . . . . . . . 26
Enhanced CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Clock definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
CPU clock (OSCCLK) . . . . . . . . . . . . . . . . . . . . . . . 26
Low speed oscillator option (P89LPC912,
P89LPC913) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Medium speed oscillator option
(P89LPC912, P89LPC913). . . . . . . . . . . . . . . . . . . 26
High speed oscillator option (P89LPC912,
P89LPC913) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Clock output (P89LPC912, P89LPC913). . . . . . . . . 27
On-chip RC oscillator option . . . . . . . . . . . . . . . . . . 27
Watchdog oscillator option. . . . . . . . . . . . . . . . . . . . 27
External clock input option (P89LPC912,
P89LPC913) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
CPU Clock (CCLK) wake-up delay. . . . . . . . . . . . . . 29
CPU Clock (CCLK) modification: DIVM register . . . 29
Low power select . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Memory organization . . . . . . . . . . . . . . . . . . . . . . . . 29
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
External interrupt inputs. . . . . . . . . . . . . . . . . . . . . . 30
I/O ports. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Port configurations . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Quasi-bidirectional output configuration. . . . . . . . . . 32
Open-drain output configuration. . . . . . . . . . . . . . . . 33
Input-only configuration . . . . . . . . . . . . . . . . . . . . . . 33
Push-pull output configuration . . . . . . . . . . . . . . . . . 33
Port 0 analog functions . . . . . . . . . . . . . . . . . . . . . . 33
Additional port features . . . . . . . . . . . . . . . . . . . . . . 34
Power monitoring functions . . . . . . . . . . . . . . . . . . . 34
Brownout detection . . . . . . . . . . . . . . . . . . . . . . . . . 34
Power-on detection . . . . . . . . . . . . . . . . . . . . . . . . . 34
Power reduction modes . . . . . . . . . . . . . . . . . . . . . . 34
Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Total Power-down mode. . . . . . . . . . . . . . . . . . . . . . 35
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Timers/counters 0 and 1 . . . . . . . . . . . . . . . . . . . . . 36
Mode 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Mode 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
9.2.4
9.2.5
9.2.6
9.3
9.4
9.5
9.6
9.7
9.8
9.9
9.10
9.10.1
9.11
9.11.1
9.11.2
9.11.3
9.11.4
9.11.5
9.11.6
9.11.7
9.12
9.12.1
9.12.2
9.13
9.13.1
9.13.2
9.13.3
9.14
9.15
9.15.1
9.15.2
9.15.3
9.15.4
9.15.5
9.15.6
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Mode 6 (P89LPC912, P89LPC914) . . . . . . . . . . . . . 37
Timer overflow toggle output (P89LPC912,
P89LPC914) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Real-Time clock/system timer. . . . . . . . . . . . . . . . . . 37
UART (P89LPC913, P89LPC914) . . . . . . . . . . . . . . 37
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Baud rate generator and selection . . . . . . . . . . . . . . 38
Framing error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Break detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Double buffering . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Transmit interrupts with double buffering
enabled (Modes 1, 2 and 3). . . . . . . . . . . . . . . . . . . 39
The 9
th
bit (bit 8) in double buffering (Modes 1, 2 and
3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . 39
Typical SPI configurations. . . . . . . . . . . . . . . . . . . . . 41
Analog comparators . . . . . . . . . . . . . . . . . . . . . . . . . 43
Internal reference voltage. . . . . . . . . . . . . . . . . . . . . 43
Comparator interrupt. . . . . . . . . . . . . . . . . . . . . . . . . 43
Comparator and power reduction modes . . . . . . . . . 44
Keypad interrupt (KBI) . . . . . . . . . . . . . . . . . . . . . . . 44
Watchdog timer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Additional features . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Software reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Dual data pointers. . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Flash program memory. . . . . . . . . . . . . . . . . . . . . . . 46
General description. . . . . . . . . . . . . . . . . . . . . . . . . . 46
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Flash organization . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Flash programming and erasing. . . . . . . . . . . . . . . . 47
In-circuit programming (ICP). . . . . . . . . . . . . . . . . . . 47
In-application programming (IAP-Lite) . . . . . . . . . . . 47
Using flash as data storage . . . . . . . . . . . . . . . . . . . 47
User configuration bytes. . . . . . . . . . . . . . . . . . . . . . 47
User sector security bytes . . . . . . . . . . . . . . . . . . . . 47
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 49
Dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . 51
Comparator electrical characteristics . . . . . . . . . . . 59
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
9.16
9.17
9.17.1
9.17.2
9.17.3
9.17.4
9.17.5
9.17.6
9.17.7
9.17.8
9.17.9
9.17.10
9.18
9.18.1
9.19
9.20
9.21
9.22
9.23
9.24
9.25
9.25.1
9.25.2
9.26
9.26.1
9.26.2
9.26.3
9.26.4
9.26.5
9.26.6
9.26.7
9.26.8
9.26.9
10
11
12
13
14
15
16
17
18
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
P89LPC912FDH 制造商:NXP Semiconductors 功能描述:MCU 8BIT 80C51 1K FLASH TSSOP14 制造商:NXP Semiconductors 功能描述:MCU 8BIT 80C51 1K FLASH, TSSOP14
P89LPC912FDH,129 功能描述:8位微控制器 -MCU 80C51 1K FL 128B RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
P89LPC912FDH129 制造商:NXP Semiconductors 功能描述:IC 8BIT MCU 80C51 18MHZ TSSOP-14
P89LPC912HDH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers with two-clock 80C51 core, 1 kB 3 V flash with 128-byte RAM
P89LPC913 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM
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