參數(shù)資料
型號(hào): P89LPC9103
廠商: NXP Semiconductors N.V.
元件分類: 8位微控制器
英文描述: 8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable Flash with 8-bit A/D converter
中文描述: 8位微控制器兩個(gè)小時(shí)加速80C51的核心具有1KB 3伏字節(jié)可擦除閃存的8位A / D轉(zhuǎn)換器
文件頁數(shù): 31/58頁
文件大?。?/td> 257K
代理商: P89LPC9103
9397 750 14655
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 11 April 2005
31 of 58
Philips Semiconductors
P89LPC9102/9103/9107
8-bit microcontrollers with two-clock accelerated 80C51 core
8.12.2
Quasi-bidirectional output configuration
Quasi-bidirectional output type can be used as both an input and output without the need
to reconfigure the port. This is possible because when the port outputs a logic HIGH, it is
weakly driven, allowing an external device to pull the pin LOW. When the pin is driven
LOW, it is driven strongly and able to sink a fairly large current. These features are
somewhat similar to an open-drain output except that there are three pull-up transistors in
the quasi-bidirectional output that serve different purposes.
The P89LPC9102/9103/9107 is a 3 V device, however, the pins are 5 V-tolerant. In
quasi-bidirectional mode, if a user applies 5 V on the pin, there will be a current flowing
from the pin to V
DD
, causing extra power consumption. Therefore, applying 5 V in
quasi-bidirectional mode is discouraged.
A quasi-bidirectional port pin has a Schmitt triggered input that also has a glitch
suppression circuit.
8.12.3
Open-drain output configuration
The open-drain output configuration turns off all pull-ups and only drives the pull-down
transistor of the port driver when the port latch contains a logic 0. To be used as a logic
output, a port configured in this manner must have an external pull-up, typically a resistor
tied to V
DD
.
An open-drain port pin has a Schmitt triggered input that also has a glitch suppression
circuit.
8.12.4
Input-only configuration
The input-only port configuration has no output drivers. It is a Schmitt triggered input that
also has a glitch suppression circuit.
8.12.5
Push-pull output configuration
The push-pull output configuration has the same pull-down structure as both the
open-drain and the quasi-bidirectional output modes, but provides a continuous strong
pull-up when the port latch contains a logic 1. The push-pull mode may be used when
more source current is needed from a port output. A push-pull port pin has a Schmitt
triggered input that also has a glitch suppression circuit.
8.12.6
Port 0 analog functions
The P89LPC9102/9103/9107 incorporates an Analog Comparator. In order to give the
best analog function performance and to minimize power consumption, pins that are being
used for analog functions must have the digital outputs and digital inputs disabled.
Digital outputs are disabled by putting the port output into the Input-only (high-impedance)
mode as described in
Section 8.12.4 “Input-only configuration”
.
Digital inputs on Port 0 may be disabled through the use of the PT0AD register. On any
reset, the PT0AD bits default to logic 0s to enable digital functions.
8.12.7
Additional port features
After power-up, all pins are in Input-only mode.
Please note that this is different from
the LPC76x series of devices.
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P89LPC9107 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable flash with 8-bit A/D converter
P89LPC9107FDH 制造商:NXP Semiconductors 功能描述:MCU 8BIT 80C51 1K FLASH TSSOP14
P89LPC9107FDH,129 功能描述:8位微控制器 -MCU 80C51 1K FL 128B RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT