參數(shù)資料
型號: P89LPC904FD
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable Flash with 8-bit A/D converter
中文描述: 8-BIT, FLASH, 12 MHz, MICROCONTROLLER, PDSO8
封裝: 3.90 MM, PLASTIC, MS-012, SOT-96-1, SO-8
文件頁數(shù): 41/41頁
文件大?。?/td> 190K
代理商: P89LPC904FD
Koninklijke Philips Electronics N.V. 2004.
Printed in the U.S.A.
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 25 June 2004
Document order number: 9397 750 13521
Contents
Philips Semiconductors
P89LPC904
8-bit microcontrollers with two-clock accelerated 80C51 core
1
2
2.1
2.2
3
3.1
4
5
5.1
5.2
6
7
8
8.1
8.2
8.2.1
8.2.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.9.1
8.9.2
8.9.3
8.9.4
8.9.5
8.9.6
8.9.7
8.9.8
8.10
8.11
8.12
8.12.1
8.13
8.13.1
8.13.2
8.13.3
8.13.4
8.13.5
8.13.6
8.13.7
8.14
8.14.1
8.14.2
8.15
8.15.1
8.15.2
8.15.3
8.16
8.17
General description. . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Principal features . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Additional features . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinning information. . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pinning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Logic symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Special function registers. . . . . . . . . . . . . . . . . . . . . . 8
Functional description . . . . . . . . . . . . . . . . . . . . . . . 13
Enhanced CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Clock definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
CPU clock (CCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . 13
On-chip RC oscillator option . . . . . . . . . . . . . . . . . . 13
Watchdog oscillator option. . . . . . . . . . . . . . . . . . . . 13
External clock input option. . . . . . . . . . . . . . . . . . . . 14
CPU CLock (CCLK) wake-up delay . . . . . . . . . . . . . 15
CPU CLOCK (CCLK) modification: DIVM register. . 15
Low power select . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
A/D converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
General description . . . . . . . . . . . . . . . . . . . . . . . . . 16
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
A/D operating modes . . . . . . . . . . . . . . . . . . . . . . . . 17
Conversion start modes. . . . . . . . . . . . . . . . . . . . . . 18
Boundary limits interrupt . . . . . . . . . . . . . . . . . . . . . 19
DAC output to a port pin with high output impedance 19
Clock divider. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Power-down and idle mode . . . . . . . . . . . . . . . . . . . 19
Memory organization . . . . . . . . . . . . . . . . . . . . . . . . 19
Data RAM arrangement. . . . . . . . . . . . . . . . . . . . . . 19
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
External interrupt inputs. . . . . . . . . . . . . . . . . . . . . . 20
I/O ports. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Port configurations . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Quasi-bidirectional output configuration. . . . . . . . . . 22
Open-drain output configuration. . . . . . . . . . . . . . . . 22
Input-only configuration . . . . . . . . . . . . . . . . . . . . . . 22
Push-pull output configuration . . . . . . . . . . . . . . . . . 22
Port 0 analog functions . . . . . . . . . . . . . . . . . . . . . . 22
Additional port features . . . . . . . . . . . . . . . . . . . . . . 23
Power monitoring functions . . . . . . . . . . . . . . . . . . . 23
Brownout detection . . . . . . . . . . . . . . . . . . . . . . . . . 23
Power-on detection . . . . . . . . . . . . . . . . . . . . . . . . . 23
Power reduction modes . . . . . . . . . . . . . . . . . . . . . . 23
Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Total Power-down mode. . . . . . . . . . . . . . . . . . . . . . 24
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Timers/counters 0 and 1 . . . . . . . . . . . . . . . . . . . . . 25
8.17.1
8.17.2
8.17.3
8.17.4
8.18
8.19
8.19.1
8.19.2
8.19.3
8.19.4
8.19.5
8.19.6
8.19.7
8.19.8
8.19.9
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Real-Time clock/system timer. . . . . . . . . . . . . . . . . . 25
UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Baud rate generator and selection . . . . . . . . . . . . . . 26
Framing error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Break detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Double buffering . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Transmit interrupts with double buffering
enabled (Modes 1, 2 and 3). . . . . . . . . . . . . . . . . . . 27
The 9
th
bit (bit 8) in double buffering (Modes 1, 2 and
3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Analog comparators . . . . . . . . . . . . . . . . . . . . . . . . . 28
Internal reference voltage. . . . . . . . . . . . . . . . . . . . . 28
Comparator interrupt. . . . . . . . . . . . . . . . . . . . . . . . . 29
Comparator and power reduction modes . . . . . . . . . 29
Keypad interrupt (KBI) . . . . . . . . . . . . . . . . . . . . . . . 29
Watchdog timer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Additional features . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Software reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Dual data pointers. . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Flash program memory. . . . . . . . . . . . . . . . . . . . . . . 31
General description. . . . . . . . . . . . . . . . . . . . . . . . . . 31
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Flash organization . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Flash programming and erasing. . . . . . . . . . . . . . . . 31
In-circuit programming (ICP). . . . . . . . . . . . . . . . . . . 31
In-application programming . . . . . . . . . . . . . . . . . . . 32
Using flash as data storage . . . . . . . . . . . . . . . . . . . 32
User configuration bytes. . . . . . . . . . . . . . . . . . . . . . 32
User sector security bytes . . . . . . . . . . . . . . . . . . . . 32
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 34
Dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . 36
Comparator electrical characteristics . . . . . . . . . . . 37
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.19.10
8.20
8.21
8.22
8.23
8.24
8.25
8.26
8.26.1
8.26.2
8.27
8.27.1
8.27.2
8.27.3
8.27.4
8.27.5
8.27.6
8.27.7
8.27.8
8.27.9
9
10
11
12
13
14
15
16
17
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