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參數(shù)資料
| 型號： | P89LPC903FD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM |
| 中文描述： | 8-BIT, FLASH, 7.3728 MHz, MICROCONTROLLER, PDSO8 |
| 封裝： | 3.90 MM, PLASTIC, MS-012, SOT-96-1, SO-8 |
| 文件頁數(shù)： | 37/55頁 |
| 文件大?。?/td> | 1236K |
| 代理商： | P89LPC903FD |
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Philips Semiconductors
P89LPC901/902/903
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 04 — 21 November 2003
37 of 55
9397 750 12293
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
8.18.9
Transmit interrupts with double buffering enabled (Modes 1, 2 and 3)
Unlike the conventional UART, in double buffering mode, the Tx interrupt is generated
when the double buffer is ready to receive new data.
8.18.10
The 9
th
bit (bit 8) in double buffering (Modes 1, 2 and 3)
If double buffering is disabled TB8 can be written before or after SBUF is written, as
long as TB8 is updated some time before that bit is shifted out. TB8 must not be
changed until the bit is shifted out, as indicated by the Tx interrupt.
If double buffering is enabled, TB8
must
be updated before SBUF is written, as TB8
will be double-buffered together with SBUF data.
8.19 Analog comparators
One analog comparator is provided on the P89LPC901. Two analog comparators are
provided on the P89LPC902 and P89LPC903 devices. Comparator operation is such
that the output is a logical one (which may be read in a register) when the positive
input is greater than the negative input (selectable from a pin or an internal reference
voltage). Otherwise the output is a zero. The comparator may be configured to cause
an interrupt when the output value changes.
The connections to the comparator are shown in
Figure 19
.
Note:
Not all possible
comparator configurations are available on all three devices. Please refer to the Logic
diagrams in
Section 6 “Logic symbols” on page 12
. The comparator functions to
V
DD
= 2.4 V.
When the comparator is first enabled, the comparator output and interrupt flag are not
guaranteed to be stable for 10 microseconds. The comparator interrupt should not be
enabled during that time, and the comparator interrupt flag must be cleared before
the interrupt is enabled in order to prevent an immediate interrupt service.
When a comparator is disabled the comparator’s output, COx, goes HIGH. If the
comparator output was LOW and then is disabled, the resulting transition of the
comparator output from a LOW to HIGH state will set the comparator flag, CMFx.
This will cause an interrupt if the comparator interrupt is enabled. The user should
therefore disable the comparator interrupt prior to disabling the comparator.
Additionally, the user should clear the comparator flag, CMFx, after disabling the
comparator.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P89LPC903FD,112 | 功能描述:8位微控制器 -MCU 80C51 1K FL 128B RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P89LPC903FD112 | 制造商:NXP Semiconductors 功能描述:IC 8BIT MCU 80C51 12MHZ SOIC-8 |
| P89LPC904 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable Flash with 8-bit A/D converter |
| P89LPC904FD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable Flash with 8-bit A/D converter |
| P89LPC904FD,529 | 功能描述:8位微控制器 -MCU 1K FL/128B RAM/ADC/STD P/OUT RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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