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參數(shù)資料
| 型號： | P89LPC902FD,112 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 18/53頁 |
| 文件大小： | 0K |
| 描述： | IC 80C51 MCU FLASH 1K 8-SOIC |
| 產品培訓模塊： | Migrating from 8/16-Bit MCUs to 32-Bit ARMs |
| 標準包裝： | 1 |
| 系列： | LPC900 |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 7.3728MHz |
| 外圍設備： | 欠壓檢測/復位，LED，POR，WDT |
| 輸入/輸出數(shù)： | 6 |
| 程序存儲器容量： | 1KB（1K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 128 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.4 V ~ 3.6 V |
| 振蕩器型： | 內部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 包裝： | 剪切帶 (CT) |
| 配用： | 622-1006-ND - SOCKET ADAPTER BOARD 568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X |
| 其它名稱： | 568-1995-1 |
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Philips Semiconductors
P89LPC901/902/903
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 05 — 17 December 2004
25 of 53
9397 750 14465
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.2.5
High speed oscillator option (P89LPC901)
This option supports an external crystal in the range of 4 MHz to 18 MHz. Ceramic
resonators are also supported in this conguration. When using an oscillator
frequency above 12 MHz, the reset input function of P1.5 must be enabled. An
external circuit is required to hold the device in reset at power-up until VDD has
reached its specied level. When system power is removed VDD will fall below
the minimum specied operating voltage. When using an oscillator frequency
above 12 MHz, in some applications, an external brownout detect circuit may
be required to hold the device in reset when VDD falls below the minimum
specied operating voltage. If CCLK is 8 MHz or slower, the CLKLP SFR bit
(AUXR1.7) can be set to ‘1’ to reduce power consumption. On reset, CLKLP is ‘0’
allowing highest performance access. This bit can then be set in software if CCLK is
running at 8 MHz or slower.
8.2.6
Clock output (P89LPC901)
The P89LPC901 supports a user selectable clock output function on the
XTAL2/CLKOUT pin when crystal oscillator is not being used. This condition occurs if
another clock source has been selected (on-chip RC oscillator, Watchdog oscillator,
external clock input on X1) and if the Real-Time clock is not using the crystal
oscillator as its clock source. This allows external devices to synchronize to the
P89LPC901. This output is enabled by the ENCLK bit in the TRIM register. The
frequency of this clock output is 1
2 that of the CCLK. If the clock output is not needed
in Idle mode, it may be turned off prior to entering Idle, saving additional power.
8.3 On-chip RC oscillator option
The P89LPC901/902/903 has a 6-bit TRIM register that can be used to tune the
frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory
pre-programmed value to adjust the oscillator frequency to 7.373 MHz,
±2.5%.
End-user applications can write to the Trim register to adjust the on-chip RC oscillator
to other frequencies. If CCLK is 8 MHz or slower, the CLKLP SFR bit (AUXR1.7) can
be set to ‘1’ to reduce power consumption. On reset, CLKLP is ‘0’ allowing highest
performance access. This bit can then be set in software if CCLK is running at 8 MHz
or slower.
8.4 Watchdog oscillator option
The Watchdog has a separate oscillator which has a frequency of 400 kHz. This
oscillator can be used to save power when a high clock frequency is not needed.
8.5 External clock input option (P89LPC901)
In this conguration, the processor clock is derived from an external source driving
the XTAL1/P3.1 pin. The rate may be from 0 Hz up to 18 MHz. The XTAL2/P3.0 pin
may be used as a standard port pin or a clock output. When using an oscillator
frequency above 12 MHz, the reset input function of P1.5 must be enabled. An
external circuit is required to hold the device in reset at power-up until VDD has
reached its specied level. When system power is removed VDD will fall below
the minimum specied operating voltage. When using an oscillator frequency
above 12 MHz, in some applications, an external brownout detect circuit may
be required to hold the device in reset when VDD falls below the minimum
specied operating voltage.
相關PDF資料 |
PDF描述 |
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| P89LPC901FD,112 | IC 80C51 MCU FLASH 1K 8-SOIC |
| DS80C320-ENL | IC MCU HI SPEED 33MHZ IND 44TQFP |
| DS80C323-END | IC MCU HI SPEED 18MHZ IND 44TQFP |
| DS80C320-ENG | IC MCU HI SPEED 25MHZ IND 44TQFP |
| DS89C450-ENG | IC MCU FLASH 64KB 25MHZ 44-TQFP |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| P89LPC902FN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM |
| P89LPC902FN,129 | 功能描述:8位微控制器 -MCU 80C51 1K FL 128B RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P89LPC902FN.129 | 制造商:NXP Semiconductors 功能描述:8BIT MCU 1K FLASH 89LC902 DIP8 |
| P89LPC903 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM |
| P89LPC903FD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM |
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