參數(shù)資料
型號： P87C592EFA
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-bit microcontroller with on-chip CAN
中文描述： 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQCC68
文件頁數(shù)： 72/108頁
文件大?。?/td> 650K
代理商： P87C592EFA
1996 Jun 27
72
Philips Semiconductors
Product specification
8-bit microcontroller with on-chip CAN
P8xC592
17.1
Power-on Reset
If the RST pin is connected to V
DD
via a 2.2
μ
F capacitor,
as shown in Fig.26, an automatic reset can be obtained by
switching on V
DD
(provided its rise time is
<
10 ms). The
decrease of the RST pin voltage depends on the capacitor
and the internal resistor R
RST
. That voltage must remain
above the lower threshold for at minimum the oscillator
start-up time plus 2 machine cycles.
18 INSTRUCTION SET
The P8xC592 uses the powerful instruction set of the
P80C51. It consists of 49 single-byte, 45 two-byte and
17 three-byte instructions. Using a 16 MHz quartz, 64 of
the instructions are executed in 0.75
μ
s, 45 in 1.5
μ
s and
the multiply, divide instructions in 3
μ
s. A summary of the
instruction set is given in Tables 84, 85, 86, 87 and 88.
Fig.26 Power-on-reset.
ndbook, halfpage
VDD
RST
2.2
μ
F
RRST
MGA171
P8xC592
18.1
Addressing Modes
Most instructions have a ‘destination/source’ field that
specifies the data type, addressing modes and operands
involved. For all these instructions, except from MOVs, the
destination operand is also a source operand
(e.g. ADD A, R7).
Five types of addressing modes are used:
Register Addressing,
– R0 to R7 (4 banks)
– A,B,C (bit), AB (2 bytes), DPTR (double byte).
Direct Addressing,
– lower 128 bytes of internal MAIN RAM
(including the 4 R0 to R7 register banks)
– Special Function Registers (SFRs)
– 128 bits in a subset of the internal MAIN RAM
(see Fig.5)
– 128 bits in a subset of the Special Function Registers
(see Figs 6 and 7).
Register-Indirect Addressing,
– internal RAM (@R0, @R1, @SP
[
PUSH/POP
]
)
– internal AUXILIARY RAM (@R0, @R1, @DPTR)
– external Data Memory (@DPTR).
Immediate Addressing,
– Program Memory (in-code 8 bit or 16 bit constant).
Base-Register-plus Index-Register-Indirect Addressing,
– Program Memory look-up table
(@DPTR+A, @PC+A).
The first three addressing modes are usable for
destination operands.
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