參數(shù)資料
型號： P83C766BDP
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： Microcontrollers for PAL/SECAM TV with OSD and VST
中文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PDIP42
封裝： 0.600 INCH, PLASTIC, SDIP-42
文件頁數(shù)： 70/92頁
文件大小： 382K
代理商： P83C766BDP
1999 Mar 10
70
Philips Semiconductors
Product specification
Microcontrollers for PAL/SECAM TV
with OSD and VST
P8xCx66 family
18 EPROM PROGRAMMER
18.1
Interface to the on-chip EPROMs
The P87C766 contains two EPROMs: the program
EPROM and the OSD EPROM. The EPROM memory map
is shown in Fig.46.
The 64K
×
8-bit program EPROM is subdivided into four
EPROM modules: Modules 1 to 4, each of 16 kbytes.
The 8K
×
8-bit OSD EPROM is subdivided into two
modules: OSDL and OSDH, each of 4 kbytes. The OSDL
module provides the 8 LSBs of the 12-bit character word
and the OSDH module provides the 4 MSBs of the 12-bit
character word. The 4 MSBs of OSDH are not used and
should be programmed to logic 1s.
To ensure greater reliability and to reduce power
consumption, all unused EPROM cells should be
programmed to logic 1s.
To program the EPROM modules, several functions of the
EPROMs must be mapped to the pins of the package.
The program EPROM uses 16 address lines: A0 to A15
– A0 to A13 are used for the EPROM address
– A14 and A15 are used to select one of the 4 program
EPROM modules; see Table 82.
The OSD EPROM uses 13 address lines A0 to A12
– A0 to A11 are used for the EPROM address
– A12 is used to select one of the 2 OSD EPROM
modules; see Table 83.
Data I/O: D0 to D7 are used for all EPROM modules
Write Enable (WE): active LOW programming pulse
Output Enable (OE): active LOW data output enable,
when in EPROM verify mode, OE must be LOW
Programming voltage: the programming and verification
voltage (V
PP
) is typically 12.75 V; when programming
and verify operations have been completed V
PP
should
be reduced to 0 V.
All other signals to be connected to the EPROM module in
the programming/verification mode are generated
internally. Table 84 gives an overview of the functions
mapped to the pins.
Programming and verification waveform characteristics
are specified in Chapter 21.
Table 82
Selection of Program EPROM modules
Table 83
Selection of OSD EPROM modules
A15
A14
PROGRAM EPROM MODULE
0
0
1
1
0
1
0
1
Module 1
Module 2
Module 3
Module 4
A12
OSD EPROM MODULE
0
1
OSDL module
OSDH module
Table 84
Truth table for EPROM modules
OPERATION MODE
WE
OE
V
PP
12.75
12.75
12.75
12.75
I/O
ADDRESS LINES
Programming Program EPROM
Verification Program EPROM
Programming OSD EPROM
Verification OSD EPROM
0
1
0
1
1
0
1
0
data in
data out
data in
data out
A0 to A15
A0 to A15
A0 to A12
A0 to A12
相關PDF資料
PDF描述
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