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參數(shù)資料
| 型號(hào)： | P83C766BDP |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Microcontrollers for PAL/SECAM TV with OSD and VST |
| 中文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PDIP42 |
| 封裝： | 0.600 INCH, PLASTIC, SDIP-42 |
| 文件頁(yè)數(shù)： | 52/92頁(yè) |
| 文件大?。?/td> | 382K |
| 代理商： | P83C766BDP |
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1999 Mar 10
52
Philips Semiconductors
Product specification
Microcontrollers for PAL/SECAM TV
with OSD and VST
P8xCx66 family
17.3.4
OSD H
ORIZONTAL
S
TART
R
EGISTER
(OSORGH)
Table 56
OSD Horizontal Start Register (SFR address C3H)
Table 57
Description of OSORGH bits
7
6
5
4
3
2
1
0
HP6
HP5
HP4
HP3
HP2
HP1
HP0
BIT
SYMBOL
HP6
HP5
HP4
HP3
HP2
HP1
HP0
DESCRIPTION
7
6
5
4
3
2
1
0
This bit is not used.
Horizontal starting position selection.
These 7 bits select the horizontal starting
position of the OSD. 1 from 110 starting positions may be selected.The reference point
of the horizontal starting position is the leading edge of HSYNC. The horizontal starting
position (HP) is calculated as follows:
Where (HP6
→
HP0) is the decimal value of the contents of OSORGH and
(HP6
→
HP0)
≥
12H.
Note that the period of the horizontal starting position plus characters display cannot be
more than one HSYNC period (for example 64
μ
s).
HP
2
HP6
HP0
→
(
)
OSD clock
×
×
=
Fig.32 OSD starting position reference points.
handbook, full pagewidth
MGL285
VPx
HPx
Personal preferrance
Sound
Picture
Tuning
Leading edge of HSYNCP is the reference point of HPx
Leading edge of VSYNCP is the reference point of VPx
VSYNCP
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