參數(shù)資料
型號(hào): P83C654X2
廠商: NXP Semiconductors N.V.
英文描述: 80C51 8-bit microcontroller family 16 kB OTP/ROM, 256B RAM, low voltage (2.7 to 5.5 V), low power, high speed (30/33 MHz)
中文描述: 80C51的8位單片機(jī)系列16kB的檢察官辦公室/光盤(pán),256B的RAM,低電壓(2.7至5.5 V),低功耗,高速(三十三分之三十〇兆赫)
文件頁(yè)數(shù): 14/88頁(yè)
文件大?。?/td> 497K
代理商: P83C654X2
Philips Semiconductors
Product data
P83C654X2/P87C654X2
80C51 8-bit microcontroller family
16 kB OTP/ROM,
256B RAM, low voltage (2.7 to 5.5 V), low power, high speed
(30/33 MHz)
2004 Apr 20
14
INTn Pin
Timer n
Gate bit
TRn
TLn
(5 Bits)
THn
(8 Bits)
TFn
Interrupt
Control
C/T = 0
C/T = 1
SU01618
OSC
÷
d*
Tn Pin
*d = 6 in 6-clock mode; d = 12 in 12-clock mode.
Figure 3. Timer/Counter 0/1 Mode 0: 13-Bit Timer/Counter
IT0
BIT
TCON.7
SYMBOL
TF1
FUNCTION
Timer 1 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or clearing the bit in software.
Timer 1 Run control bit. Set/cleared by software to turn Timer/Counter on/off.
Timer 0 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or by clearing the bit in software.
Timer 0 Run control bit. Set/cleared by software to turn Timer/Counter on/off.
Interrupt 1 Edge flag. Set by hardware when external interrupt edge detected.
Cleared when interrupt processed.
Interrupt 1 type control bit. Set/cleared by software to specify falling edge/low level triggered
external interrupts.
Interrupt 0 Edge flag. Set by hardware when external interrupt edge detected.
Cleared when interrupt processed.
Interrupt 0 Type control bit. Set/cleared by software to specify falling edge/low level
triggered external interrupts.
TCON.6
TCON.5
TR1
TF0
TCON.4
TCON.3
TR0
IE1
TCON.2
IT1
TCON.1
IE0
TCON.0
IT0
SU01516
IE0
IT1
IE1
TR0
TF0
TR1
TF1
Bit Addressable
TCON
Address = 88H
Reset Value = 00H
7
6
5
4
3
2
1
0
Figure 4. Timer/Counter 0/1 Control (TCON) Register
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