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參數(shù)資料
| 型號(hào)： | P83C592 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-bit microcontroller with on-chip CAN |
| 中文描述： | 8位微控制器芯片的CAN |
| 文件頁數(shù)： | 11/108頁 |
| 文件大?。?/td> | 650K |
| 代理商： | P83C592 |
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1996 Jun 27
11
Philips Semiconductors
Product specification
8-bit microcontroller with on-chip CAN
P8xC592
7.1
Program Memory
The Program Memory of the P8xC592 consists of 16 kbytes ROM on-chip, externally expandible up to 64 kbytes.
Table 3
Instruction fetch controlled by EA
Notes
1.
This implementation prevents reading of the internal program code by switching from external Program Memory
during a MOVC instruction.
By setting a security bit the internal Program Memory content is protected, which means it cannot be read out.
If the security bit has been set to LOW there are no restrictions for the MOVC instruction.
2.
7.2
Internal Data Memory
The internal Data Memory is physically built-up and accessible as shown in Table 4 (see Fig.5).
Table 4
Internal Data Memory size and address mode
Notes
1.
2.
MAIN RAM can be addressed directly and indirectly as in the 80C51.
AUXILIARY RAM (0 to 255):
a) Is indirectly addressable in the same way as the external Data Memory with MOVX instructions.
b) Access will not affect the ports P0, P2, P3.6 and P3.7 during internal program execution.
SFRs = Special Function Registers.
3.
PIN EA
(note 1)
INSTRUCTIONS FETCHED FROM:
ADDRESS
LOCATION
DURING RESET
LATCHED TO:
AFTER RESET
H
H
L
internal Program Memory (note 2)
external Program Memory
0000H
→
3FFFH
4000H
→
FFFFH
0000H
→
FFFFH
‘don’t care’
INTERNAL
DATA MEMORY
SIZE
LOCATION
ADDRESS MODE
POINTERS
DIRECT
INDIRECT
MAIN RAM
(note 1)
256 bytes
0 to 127
128 to 255
0 to 255
X
X
X
X
address pointers are R0 and R1 of the
selected register bank
AUXILIARY RAM
(note 2)
SFRs (note 3)
256 bytes
address pointers are R0 and R1 of the
selected register bank and the DPTR
128 bytes
128 to 255
X
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