參數資料
型號: P83C592
廠商: NXP Semiconductors N.V.
英文描述: 8-bit microcontroller with on-chip CAN
中文描述: 8位微控制器芯片的CAN
文件頁數: 101/108頁
文件大?。?/td> 650K
代理商: P83C592
1996 Jun 27
101
Philips Semiconductors
Product specification
8-bit microcontroller with on-chip CAN
P8xC592
00A0
00A1
107
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; determine the destination address in data-memory for the
; message's Data-Field
ANL
A, #ID2_0_MASK
SWAP
A
RR
A
; this value is used as an index for an array of 8 bytes
; containing the destination-addresses for the 8 different
; messages. Note, that the #RX_ARRAY_OFFSET is due to the
; program counter-relative access to the array.
ADD
A, #RX_ARRAY_START
RX_ARRAY_OFFSET
MOVC
A, @A + PC
RX_ARRAY_OFFSET:
54E0
C4
03
; use ID.2 ... ID.0 only
; A = 4*ID.2 + 2*ID.1 + ID.0
00A2
2415
83
00A5
00A7
; if a message passes the acceptance-filter of the CAN
; Controller, but the CPU doesn't need it, the array
; entry's value may be set to zero indicating this.
; The following
<
jz
>
instruction cares for this.
JZ
CAN_RX_READY
6007
00A9
00AB
00AD
; now copy the Data-Field (only) from CAN- to CPU memory
; with the aid of the DMA-logic. Note, that a TX-DMA is
; performed when writing 8AH (DMA + address 10) into CANADR
; and a RX-DMA is performed when writing 94H (DMA + address 20)
; ... 9DH (DMA + address 29) into CANADR. Here address 22 is
; used to copy just the Data-Field.
MOV
CANSTA, A
MOV
CANADR, #CAN_RX_DMA ; starts RX-DMA at address 22
F5D8
75DB96 133
; data-memory address
134
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00AE
00AF
; the DMA-transfer is done in at maximum 2 instruction cycles.
; During the transfer, neither the data-memory (RAM) nor one
; of the SFRs CANADR, CANDAT, CANCON and
; CANSTA may be accessed by the CPU.
; For simplicity, two NOPs are used here.
NOP
NOP
00B0
00
00
00A0
LOC
OBJ
LINE SOURCE
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