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參數(shù)資料
| 型號： | P83C591VFB |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Single-chip 8-bit microcontroller with CAN controller |
| 中文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44 |
| 文件頁數(shù)： | 99/161頁 |
| 文件大?。?/td> | 588K |
| 代理商： | P83C591VFB |
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1999 Aug 19
99
Philips Semiconductors
Objective Specification
Single-chip 8-bit microcontroller with CAN controller
P8xC591
15.2.15.3 I
2
C bus obstructed by a low level on SCL and
SDA
An I
2
C bus hang-up occurs if SDA or SCL is pulled LOW
by an uncontrolled source. If the SCL line is obstructed
(pulled LOW) by a device on the bus, no further serial
transfer is possible, and the SIO1 hardware cannot resolve
this type of problem. When this occurs, the problem must
be resolved by the device that is pulling the SCL bus line
LOW.
If the SDA line is obstructed by another device on the bus
(e.g., a slave device out of bit synchronization), the
problem can be solved by transmitting additional clock
pulses on the SCL line (see Figure 43). The SIO1
hardware transmits additional clock pulses when the STA
flag is set, but no START condition can be generated
because the SDA line is pulled LOW while the I
2
C bus is
considered free.
The SIO1 hardware attempts to generate a START
condition after every two additional clock pulses on the
SCL line. When the SDA line is eventually released, a
normal START condition is transmitted, state 08H is
entered, and the serial transfer continues.
If a forced bus access occurs or a repeated START
condition is transmitted while SDA is obstructed (pulled
LOW), the SIO1 hardware performs the same action as
described above. In each case, state 08H is entered after
a successful START condition is transmitted and normal
serial transfer continues. Note that the CPU is not involved
in solving these bus hang-up problems.
15.2.15.4 Bus error
A bus error occurs when a START or STOP condition is
present at an illegal position in the format frame. Examples
of illegal positions are during the serial transfer of an
address byte, a data or an acknowledge bit.
The SIO1 hardware only reacts to a bus error when it is
involved in a serial transfer either as a master or an
addressed slave. When a bus error is detected, SIO1
immediately switches to the not addressed slave mode,
releases the SDA and SCL lines, sets the interrupt flag,
and loads the status register with 00H. This status code
may be used to vector to a service routine which either
attempts the aborted serial transfer again or simply
recovers from the error condition as shown in Table 65.
Fig.43 Recovering from a bus obstruction caused by a low level on SDA.
handbook, full pagewidth
MHI044
STA FLAG
SDA LINE
SCL LINE
(1)
(1)
(2)
(3)
start
condition
(1) Unsuccessful attempt to send a Start condition.
(2) SDA line released.
(3) Successful attempt to send a Start condition; state D8H is centered.
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