參數(shù)資料
型號: P83C591VFB
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Single-chip 8-bit microcontroller with CAN controller
中文描述: 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP44
封裝: 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁數(shù): 59/161頁
文件大?。?/td> 588K
代理商: P83C591VFB
1999 Aug 19
59
Philips Semiconductors
Objective Specification
Single-chip 8-bit microcontroller with CAN controller
P8xC591
12.5.19 R
ECEIVE
B
UFFER
The global layout of the Receive Buffer is very similar to the Transmit Buffer described in the previous chapter. The
Receive Buffer is the accessible part of the RXFIFO and is located in the range between CAN Address 96 and 108. Each
message is subdivided into a Descriptor and a Data Field.
Fig.21 Example of the message storage within the RXFIFO.
Message 1 is now available in the Receive Buffer
Note that message 2 should not be read until it has been shifted to address 96 by a Release Receive
Buffer Command because this message may be in process now and due to this not fixed.
handbook, full pagewidth
MHI019
message 3
message 2
message 1
receive
buffer
window
incoming
messages
receive
FIFO
106
107
108
103
104
105
100
99
101
102
96
97
98
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