參數(shù)資料
型號(hào)： P83C591VFA
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 微控制器/微處理器
英文描述： Single-chip 8-bit microcontroller with CAN controller
中文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, MO-047AC, SOT-187-2, LCC-44
文件頁(yè)數(shù)： 51/161頁(yè)
文件大?。?/td> 588K
代理商： P83C591VFA
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)當(dāng)前第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)
1999 Aug 19
51
Philips Semiconductors
Objective Specification
Single-chip 8-bit microcontroller with CAN controller
P8xC591
12.5.17.3 Acceptance Filter Priority Register
For each available Acceptance Filter it could be defined, whether a receive interrupt is forced immediately if a message
passes a certain Acceptance Filter or whether the programmed Receive Interrupt Level should be used for interruption.
This allows to use certain Acceptance Filters for alarm message recognition interrupting the host CPU immediately.
Note, that some bits are implemented only in case of the corresponding acceptance filter bank is implemented.
Not implemented bits are read as “0”.
Table 35
Acceptance Filter Priority Register (ACF Priority) (CAN address 31)
7
6
5
4
3
2
1
0
B4F2PRIO
B4F1PRIO
B3F2PRIO
B3F1PRIO
B2F2PRIO
B2F1PRIO
B1F2PRIO
B1F1PRIO
Table 36
Acceptance Filter Priority Register (ACF Priority)
BIT
SYMBOL
NAME
VALUE
FUNCTION
ACFPRIO.7
B4F2PRIO
Bank 4 Filter 2
Priority
1 (high)
A receive interrupt is generated immediately, if a message
passes Filter 2 within Acceptance Filter Bank 4
A receive interrupt is generated, if the FIFO level exceeds
the Receive Interrupt Level Register.
A receive interrupt is generated immediately, if a message
passes Filter 1 within Acceptance Filter Bank 4
A receive interrupt is generated, if the FIFO level exceeds
the Receive Interrupt Level Register.
A receive interrupt is generated immediately, if a message
passes Filter 2 within Acceptance Filter Bank 3
A receive interrupt is generated, if the FIFO level exceeds
the Receive Interrupt Level Register.
A receive interrupt is generated immediately, if a message
passes Filter 1 within Acceptance Filter Bank 3
A receive interrupt is generated, if the FIFO level exceeds
the Receive Interrupt Level Register.
A receive interrupt is generated immediately, if a message
passes Filter 2 within Acceptance Filter Bank 2
A receive interrupt is generated, if the FIFO level exceeds
the Receive Interrupt Level Register.
A receive interrupt is generated immediately, if a message
passes Filter 1 within Acceptance Filter Bank 2
A receive interrupt is generated, if the FIFO level exceeds
the Receive Interrupt Level Register.
A receive interrupt is generated immediately, if a message
passes Filter 2 within Acceptance Filter Bank 1
A receive interrupt is generated, if the FIFO level exceeds
the Receive Interrupt Level Register.
A receive interrupt is generated immediately, if a message
passes Filter 1 within Acceptance Filter Bank 1
A receive interrupt is generated, if the FIFO level exceeds
the Receive Interrupt Level Register.
0 (low)
ACFPRIO.6
B4F1PRIO
Bank 4 Filter 1
Priority
1 (high)
0 (low)
ACFPRIO.5
B3F2PRIO
Bank 3 Filter 2
Priority
1 (high)
0 (low)
ACFPRIO.4
B3F1PRIO
Bank 3 Filter 1
Priority
1 (high)
0 (low)
ACFPRIO.3
B2F2PRIO
Bank 2Filter 2
Priority
1 (high)
0 (low)
ACFPRIO.2
B2F1PRIO
Bank 2 Filter 1
Priority
1 (high)
0 (low)
ACFPRIO.1
B1F2PRIO
Bank 1 Filter 2
Priority
1 (high)
0 (low)
ACFPRIO.0
B1F1PRIO
Bank 1 Filter 1
Priority
1 (high)
0 (low)
相關(guān)PDF資料
PDF描述
P80CE560 8-BIT SINGLE CHIP MICROCONTROLLERS
P87CE560EFB BATTERY CHG UNIV 12VDC @ 500MA
P83CE560 8-BIT SINGLE CHIP MICROCONTROLLERS
P87CE560 8-BIT SINGLE CHIP MICROCONTROLLERS
P80CE560EFB 8-BIT MICROCONTROLLER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
P83C591VFB 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller with CAN controller
P83C592 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:8-bit microcontroller with on-chip CAN
P83C592FFA 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:8-bit microcontroller with on-chip CAN
P83C592FHA 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:8-bit microcontroller with on-chip CAN
P83C652EBA 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:CMOS single-chip 8-bit microcontrollers
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*