- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367723 > P83C591 (NXP Semiconductors N.V.) Single-chip 8-bit microcontroller with CAN controller PDF資料下載
參數(shù)資料
| 型號： | P83C591 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Single-chip 8-bit microcontroller with CAN controller |
| 中文描述： | 單芯片8 - CAN控制器位微控制器 |
| 文件頁數(shù)： | 21/161頁 |
| 文件大?。?/td> | 588K |
| 代理商： | P83C591 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁
1999 Aug 19
21
Philips Semiconductors
Objective Specification
Single-chip 8-bit microcontroller with CAN controller
P8xC591
8
I/O FACILITIES
The P8xC591 consists of 32 I/O Port lines with partly
multiple functions. The I/O’s are held HIGH during reset
(asynchronous, before oscillator is running).
Ports 0, 1, 2 and 3 perform the following alternative
functions:
Port 0 is the same as in the 80C51. After reset the Port
Special Function Register is set to ’FFh’ as known
from other 80C51 derivatives. Port 0 also provides
the multiplexed low-order address and data bus
used for expanding the P8xC591 with standard
memories and peripherals.
Port 1 supports several alternative functionalities. For this
reason it has different I/O stages. Note, port P1.0
and P1.1 are Driven-High and P1.2 to P1.7 are
High-Impedance (Tri-state) after reset.
Port 2 is the same as in the 80C51. After reset the Port
Special Function Register is set to ’FFh’ as known
from other 80C51 derivatives. Port 2 also provides
the high-order address bus when the P8xC591 is
expanded with external Program Memory and/or
external Data Memory.
Port 3 is the same as in the 80C51. During reset the Port
3 Special Function Register is set to ’FFh’ as known
from other 80C51 derivatives.
9
OSCILLATOR CHARACTERISTICS
XTAL1 and XTAL2 are the input and output, respectively,
of an inverting amplifier. The pins can be configured for
use as an on-chip oscillator, as shown in the logic symbol.
To drive the device from an external clock source, XTAL1
should be driven while XTAL2 is left unconnected. There
are no requirements on the duty cycle of the external clock
signal. However, minimum and maximum high and low
times specified in the data sheet must be observed.
10 RESET
A reset is accomplished by holding the RST pin LOW for
at least two machine cycles (12 oscillator periods), while
the oscillator is running. To insure a good power-on reset,
theRST pin must be low long enough to allow the oscillator
time to start up (normally a few milliseconds) plus two
machine cycles.
The RST line can also be pulled LOW internally by a
pull-down transistor activated by the watchdog timer T3.
The length of the output pulse from T3 is 3 machine cycles.
A pulse of such short duration is necessary in order to
recover from a processor or system fault as fast as
possible.
Note that the short reset pulse from Timer T3 cannot
discharge the power-on reset capacitor (see Figure 8).
Consequently, when the watchdog timer is also used to set
external devices, this capacitor arrangement should not be
connected to the RST pin, and a different circuit should be
used to perform the power-on reset operation. A timer T3
overflow, if enabled, will force a reset condition to the
P8xC591 by an internal connection, whether the output
RST is pulled-up HIGH or not.
A reset may be performed in software by setting the
software reset bit, SRST (AUXR1.5).
This device also has a Power-on Detect Reset circuit as
V
CC
transitions from V
CC
past V
RST
.
Fig.8 On-Chip Reset Configuration.
handbook, halfpage
MHI008
SCHMITT
TRIGGER
RESET
CIRCUITRY
RST
overflow
timer T3
on-chip
resistor
VDD
Fig.9 Power-on Reset.
handbook, halfpage
MHI009
RST
RRST
2.2
μ
F
P8xC591
VDD
相關PDF資料 |
PDF描述 |
|---|---|
| P87C591 | Single-chip 8-bit microcontroller with CAN controller |
| P83C591VFA | Single-chip 8-bit microcontroller with CAN controller |
| P80CE560 | 8-BIT SINGLE CHIP MICROCONTROLLERS |
| P87CE560EFB | BATTERY CHG UNIV 12VDC @ 500MA |
| P83CE560 | 8-BIT SINGLE CHIP MICROCONTROLLERS |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| P83C591SFA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller with CAN controller |
| P83C591SFB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller with CAN controller |
| P83C591VFA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller with CAN controller |
| P83C591VFB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller with CAN controller |
| P83C592 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with on-chip CAN |
發(fā)布緊急采購，3分鐘左右您將得到回復。