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| 型號： | P83C524 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-bit microcontrollers |
| 中文描述： | 8位微控制器 |
| 文件頁數(shù)： | 57/76頁 |
| 文件大?。?/td> | 400K |
| 代理商： | P83C524 |
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1997 Dec 15
57
Philips Semiconductors
Product specification
8-bit microcontrollers
P83C524; P80C528; P83C528
21.2
See notes 1, 2 and 3.; Cl = 100 pF for Port 0, ALE and PSEN; C
L
= 80 pF for all other outputs unless otherwise
specified.
AC Characteristics 24 MHz version
Notes to the AC Characteristics 16 and 24 MHz versions
1.
For the AC Characteristics the following conditions are valid:
a)
P83C52x EBx
: V
DD
= 5 V
±
10%; V
SS
= 0 V; T
amb
= 0 to +70
°
C; t
CK
min. = 63 ns
b)
P83C52x EFx:
V
DD
= 5 V
±
10%; V
SS
= 0 V; T
amb
=
40 to +85
°
C; t
CK
min. = 63 ns.
2.
t
CK
min. = 1/f max. (maximum operating frequency); t
CK
= clock period (see section for timing symbol definitions).
3.
The maximum operating frequency is limited to 16/24 MHz and the minimum to 3.5 MHz (all versions Ixx/Exx).
SYMBOL
PARAMETER
24 MHZ
VARIABLE CLOCK
UNIT
MIN.
MAX.
MIN.
MAX.
External program memory
t
LHLL
t
AVLL
t
LLAX
t
LLIV
t
LLPL
t
PLPH
t
PLIV
t
PXIX
t
PXIZ
t
AVIV
t
PLAZ
ALE pulse duration
address set-up time to ALE
address hold time after ALE
time from ALE to valid instruction input
time from ALE to control pulse PSEN
control pulse duration PSEN
time from PSEN to valid instruction input
input instruction hold time after PSEN
input instruction float delay after PSEN
address to valid instruction input
address float time to PSEN
43
17
17
17
80
0
102
65
17
128
10
2 t
CK
40
t
CK
25
t
CK
25
t
CK
25
3 t
CK
45
0
4 t
CK
65
3 t
CK
60
t
CK
25
5 t
CK
80
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
External data memory
t
LHLL
t
AVLL
t
LLAX
t
RLRH
t
WLWH
t
RLDV
t
RHDX
t
RHDZ
t
LLDZ
t
AVDV
t
LLWL
t
AVWL
t
WHLH
t
QVWX
t
QVWH
t
WHQX
t
RLAZ
ALE pulse duration
address set-up time to ALE
address hold time after ALE
RD pulse duration
WR pulse duration
RD to valid data input
data hold time after RD
data float delay after RD
time from ALE to valid data input
address to valid data input
time from ALE to RD or WR
time from address to RD or WR
time from RD or WR HIGH to ALE HIGH
data valid to WR transition
data set-up time before WR
data hold time after WR
address float delay after RD
43
17
17
150
150
0
75
92
17
12
162
17
118
55
183
210
175
67
0
2 t
CK
40
t
CK
25
t
CK
25
6 t
CK
100
6 t
CK
100
0
3 t
CK
50
4 t
CK
75
t
CK
25
t
CK
30
7 t
CK
130
t
CK
25
5 t
CK
90
2 t
CK
28
8 t
CK
150
9 t
CK
165
3 t
CK
+50
t
CK
+ 25
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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|---|---|
| P83C524EBA | 8-bit microcontrollers |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| P83C524EBA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers |
| P83C524EBB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers |
| P83C524EBP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers |
| P83C524EFA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers |
| P83C524EFB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers |
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