- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367726 > P83C266BDR (NXP SEMICONDUCTORS) Microcontrollers for PAL/SECAM TV with OSD and VST PDF資料下載
參數(shù)資料
| 型號： | P83C266BDR |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Microcontrollers for PAL/SECAM TV with OSD and VST |
| 中文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PDIP42 |
| 封裝： | 0.600 INCH, PLASTIC, SDIP-42 |
| 文件頁數(shù)： | 29/92頁 |
| 文件大小： | 382K |
| 代理商： | P83C266BDR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁當前第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
1999 Mar 10
29
Philips Semiconductors
Product specification
Microcontrollers for PAL/SECAM TV
with OSD and VST
P8xCx66 family
11.10 VSYNC interrupt and level status bit
The SFR VINT is read-only. Figure 13 shows the timing diagram of VSYNC interrupt.
Table 33
VSYNC Interrupt Register (SFR address C9H)
Table 34
Description of VINT bits
11.10.1 E
XTERNAL INTERRUPT REQUEST
(IQ7)
A rising or falling edge (see Fig.13) of the active VSYNC signal generates a pending interrupt to the CPU and drives IQ7
HIGH (IQ7 resides in the SFR IRQ1). In the service routine, this bit should be cleared before return to main routine.
As long as this bit is HIGH a pending interrupt is always there. Each time VSYNC is activated by a rising or falling edge,
IQ7 is set HIGH. If the interrupt is not serviced before the next leading VSYNC edge, then IQ7 is written HIGH again and
no error of overrun is indicated.
7
6
5
4
3
2
1
0
VLVL
BIT
SYMBOL
VLVL
DESCRIPTION
7 to 1
0
These 7 bits are not used.
VSYNC input pin level.
The state of this bit indicates the level of the VSYNC input. As
the input polarity of VSYNC is programmable two situations may be defined.
If VSYNC is programmed active HIGH then:
VLVL = 0, means VSYNC is at a LOW level, i.e. raster scan period
VLVL = 1, means VSYNC is at HIGH level, i.e.vertical fly-back period.
If VSYNC is programmed to active LOW then:
VLVL = 0, means VSYNC is at LOW level, i.e. vertical fly-back period
VLVL = 1, means VSYNC is at HIGH level, i.e. raster scan period
Fig.13 Timing diagram of VSYNC interrupt.
handbook, full pagewidth
VSYNC
VSYNC
VSYNC active LOW (Vp = 0)
VSYNC active HIGH (Vp = 1)
MGL286
The falling edge of VSYNC generates interrupt
The rising edge of VSYNC generates an interrupt
相關PDF資料 |
PDF描述 |
|---|---|
| P83C366 | Microcontrollers for PAL/SECAM TV with OSD and VST |
| P83C280 | Microcontrollers for monitors with DDC interface, auto-sync detection and sync proc(帶DDC接口，同步監(jiān)測和同步處理的監(jiān)視器微控制器) |
| P83C380 | Microcontrollers for monitors with DDC interface, auto-sync detection and sync proc(帶DDC接口，同步監(jiān)測和同步處理的監(jiān)視器微控制器) |
| P87C380 | Microcontrollers for monitors with DDC interface, auto-sync detection and sync proc(帶DDC接口，同步監(jiān)測和同步處理的監(jiān)視器微控制器) |
| P83C880 | Microcontrollers for monitors with DDC interface, auto-sync detection and sync proc(帶DDC接口，同步監(jiān)測和同步處理的監(jiān)視器微控制器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| P83C270 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Microcontrollers for NTSC TVs with On-Screen Display OSD and Closed Caption CC |
| P83C270AAR | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Microcontrollers for NTSC TVs with On-Screen Display OSD and Closed Caption CC |
| P83C280 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Microcontrollers for monitors with DDC interface, auto-sync detection and sync proc. |
| P83C366 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Microcontrollers for PAL/SECAM TV with OSD and VST |
| P83C366BDA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Microcontrollers for PAL/SECAM TV with OSD and VST |
發(fā)布緊急采購，3分鐘左右您將得到回復。