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參數(shù)資料
| 型號(hào)： | P8042AH |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | UNIVERSAL PERIPHERAL INTERFACE 8-BIT SLAVE MICROCONTROLLER |
| 中文描述： | 8-BIT, MROM, 0.833 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 19/20頁 |
| 文件大?。?/td> | 243K |
| 代理商： | P8042AH |
UPI-41AH/42AH
Table 2. UPI Instruction Set
Mnemonic
Description
Bytes
Cycles
ACCUMULATOR
ADD A, Rr
ADD A,
@
Rr
Add register to A
Add data memory
to A
Add immediate to A
Add register to A
with carry
Add data memory
to A with carry
Add immediate
to A with carry
AND register to A
AND data memory
to A
AND immediate to A
OR register to A
OR data memory
to A
OR immediate to A
Exclusive OR regis-
ter to A
Exclusive OR data
memory to A
Exclusive OR imme-
diate to A
Increment A
Decrement A
Clear A
Complement A
Decimal Adjust A
Swap nibbles of A
Rotate A left
Rotate A left through
carry
Rotate A right
Rotate A right
through carry
1
1
1
1
ADD A,
Y
data
ADDC A, Rr
2
1
2
1
ADDC A,
@
Rr
1
1
ADDC A,
Y
data
2
2
ANL A, Rr
ANL, A
@
Rr
1
1
1
1
ANL A,
Y
data
ORL A, Rr
ORL, A,
@
Rr
2
1
1
2
1
1
ORL A,
Y
data
XRL A, Rr
2
1
2
1
XRL A,
@
Rr
1
1
XRL A,
Y
data
2
2
INC A
DEC A
CLR A
CPL A
DA A
SWAP A
RL A
RLC A
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
RR A
RRC A
1
1
1
1
INPUT/OUTPUT
IN A, Pp
OUTL Pp, A
ANL Pp,
Y
data
Input port to A
Output A to port
AND immediate to
port
OR immediate to
port
Input DBB to A,
clear IBF
Output A to DBB,
set OBF
A
4
–A
7
to Bits 4–7 of
Status
Input Expander
port to A
Output A to
Expander port
AND A to Expander
port
OR A to Expander
port
1
1
2
2
2
2
ORL Pp,
Y
data
2
2
IN A, DBB
1
1
OUT DBB, A
1
1
MOV STS, A
1
1
MOVD A, Pp
1
2
MOVD Pp, A
1
2
ANLD Pp, A
1
2
ORLD Pp, A
1
2
Mnemonic
Description
Bytes
Cycles
DATA MOVES
MOV A, Rr
MOV A,
@
Rr
Move register to A
Move data memory
to A
Move immediate to A
Move A to register
Move A to data
memory
Move immediate to
register
Move immediate to
data memory
Move PSW to A
Move A to PSW
Exchange A and
register
Exchange A and
data memory
Exchange digit of A
and register
Move to A from
current page
Move to A from
page 3
1
1
1
1
MOV A,
Y
data
MOV Rr, A
MOV
@
Rr, A
2
1
1
2
1
1
MOV Rr,
Y
data
2
2
MOV
@
Rr,
Y
data
MOV A, PSW
MOV PSW, A
XCH A, Rr
2
2
1
1
1
1
1
1
XCH A,
@
Rr
1
1
XCHD A,
@
Rr
1
1
MOVP A,
@
A
1
2
MOVP3, A,
@
A
1
2
TIMER/COUNTER
MOV A, T
MOV T, A
STRT T
STRT CNT
STOP TCNT
EN TCNTI
Read Timer/Counter
Load Timer/Counter
Start Timer
Start Counter
Stop Timer/Counter
Enable Timer/
Counter Interrupt
Disable Timer/
Counter Interrupt
1
1
1
1
1
1
1
1
1
1
1
1
DIS TCNTI
1
1
CONTROL
EN DMA
Enable DMA Hand-
shake Lines
Enable IBF Interrupt
1
1
EN I
1
1
DIS I
Diable IBF Inter-
rupt
Enable Master
Interrupts
Select register
bank 0
Select register
bank 1
No Operation
1
1
EN FLAGS
1
1
SEL RB0
1
1
SEL RB1
1
1
NOP
1
1
REGISTERS
INC Rr
INC
@
Rr
Increment register
Increment data
memory
Decrement register
1
1
1
1
DEC Rr
1
1
19
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