參數(shù)資料
型號： ORSO42G5-3BMN484C
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 97/153頁
文件大?。?/td> 0K
描述： IC TRANCEIVERS FPSC 680FPGAM
產品變化通告： Product Discontinuation 01/Aug/2011
標準包裝： 60
系列： *
Lattice Semiconductor
ORCA ORSO42G5 and ORSO82G5 Data Sheet
48
Alignment Mode Setup Procedures – ORSO82G5
The control register bits for alignment FIFO in the ORSO42G5 and ORSO82G5 are described below.
Table 8. Multichannel Alignment Modes – ORSO82G5
To align all eight channels:
FMPU_SYNMODE_A[A:D] = 11
FMPU_SYNMODE_B[A:D] = 11
To align twin channels in SERDES A:
FMPU_SYNMODE_A[A:D] = 01
To align four channels in SERDES A:
FMPU_SYNMODE_AB = 10
FMPU_SYNMODE_AD = 10
Similar alignment can be dened for SERDES B. To enable/disable synchronization signal of individual channel
within a multi-channel alignment group:
FMPU_STR_EN_xx = 1 enabled
FMPU_STR_EN_xx = 0 disabled
where xx is one of A[A:D] and B[A:D].
To re-synchronize a multi-channel alignment group
Set the following bit to zero, and then set it to 1 since it is a rising edge sensitive bit.
FMPU_RESYNC8 for eight channel A[A:D] and B[A:D]
FMPU_RESYNC4A for block channel A[A:D]
FMPU_RESYNC2A1 for twin channel A[A:B]
FMPU_RESYNC2A2 for twin channel A[C:D]
FMPU_RESYNC4B for block channel B[A:D]
Re-synchronization will cause the multi-channel alignment group to perform a new synchronization procedure. This
would need to occur if a link is removed from an alignment group and then paced back into service as part of the
alignment group. This is not required at power up if the alignment mode is set before the channels receive the rst
frame pulse.
Register Bits
FMPU_SYNMODE_xx
Mode
00
No multichannel alignment. (default)
01
Twin channel alignment
10
Block channel alignment
11
Eight channel alignment
Note: Where xx is one of A[A:D] and B[A:D].
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相關代理商/技術參數(shù)
參數(shù)描述
ORSO42G5-EV 功能描述:可編程邏輯 IC 開發(fā)工具 Eval Brd ORSO42G5 RoHS:否 制造商:Altera Corporation 產品:Development Kits 類型:FPGA 工具用于評估:5CEFA7F3 接口類型: 工作電源電壓:
ORSO82G5 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:0.6 to 2.7 Gbps SONET Backplane Interface FPSCs
ORSO82G5-1BM680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
ORSO82G5-1BM680I 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
ORSO82G5-1F680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 ORCA FPSC 2.7GBITS/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
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