參數(shù)資料
型號: OPA651P
英文描述: IC-LOW POWER OP-AMP
中文描述: 集成電路低功耗運(yùn)算腺苷
文件頁數(shù): 8/12頁
文件大?。?/td> 114K
代理商: OPA651P
8
OPA651
mode input and output voltage specifications can be inter-
preted as a required headroom to the supply voltage. Observ-
ing this input and output headroom requirement will allow
non-standard or single supply operation. Figure 1 shows one
approach to single-supply operation.
ESD PROTECTION
ESD damage has been well recognized for MOSFET de-
vices, but any semiconductor device is vulnerable to this
potentially damaging source. This is particularly true for
very high speed, fine geometry processes.
ESD damage can cause subtle changes in amplifier input
characteristics without necessarily destroying the device. In
precision operational amplifiers, this may cause a noticeable
degradation of offset voltage and drift. Therefore, ESD
handling precautions are strongly recommended when han-
dling the OPA651.
OUTPUT DRIVE CAPABILITY
The OPA651 has been optimized to drive 75
and 100
resistive loads. The device can drive a 2Vp-p into a 75
load.
This high-output drive capability makes the OPA651 an ideal
choice for a wide range of RF, IF, and video applications. In
many cases, additional buffer amplifiers are unneeded.
Many demanding high-speed applications such as driving
A/D converters require op amps with low wideband output
impedance. For example, low output impedance is essential
when driving the signal-dependent capacitances at the inputs
of flash A/D converters. As shown in Figure 3, the OPA651
maintains very low-closed loop output impedance over fre-
quency. Closed-loop output impedance increases with fre-
quency since loop gain is decreasing.
402
OPA651
V
AC
402
R
L
+V
S
+V
S
V
S
2
R
OUT
S
2
V
OUT
= V
AC
THERMAL CONSIDERATIONS
The OPA651 will not require heatsinking under most oper-
ating conditions. Maximum desired junction temperature
will limit the maximum allowed internal power dissipation
as described below. In no case should the maximum junction
temperature be allowed to exceed +175
°
C.
FIGURE 3. Small-Signal Output Impedance vs Frequency.
SMALL-SIGNAL OUTPUT IMPEDANCE
vs FREQUENCY
Frequency (Hz)
1k
100
10
1
0.1
0.01
10k
100k
1M
100M
10M
O
)
G = +2
OFFSET VOLTAGE ADJUSTMENT
If additional offset adjustment is needed, the circuit in
Figure 2 can be used without degrading offset drift with
temperature. Avoid external adjustment whenever possible
since extraneous noise, such as power supply noise, can be
inadvertently coupled into the amplifier’s inverting input
terminal. Remember that additional offset errors can be
created by the amplifier’s input bias currents. Whenever
possible, match the impedance seen by both inputs as is
shown with R
3
. This will reduce input bias current errors to
the amplifier’s offset current.
R
2
OPA651
(1)
R
3
= R
1
|| R
2
R
1
R
Trim
+V
S
–V
S
20k
V
IN
or Ground
Output Trim Range +V
S
to –V
S
Trim
47k
2
R
2
R
Trim
0.1μF
NOTE: (1) R
is
optional and can
be used to cancel
offset errors due
to input bias currents.
FIGURE 2. Offset Voltage Trim.
FIGURE 1. Single Supply Operation.
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