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| 型號： | OPA651P |
| 英文描述： | IC-LOW POWER OP-AMP |
| 中文描述： | 集成電路低功耗運算腺苷 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大小： | 114K |
| 代理商： | OPA651P |
7
OPA651
DISCUSSION OF
PERFORMANCE
The OPA651 is a low power, wideband voltage feedback
operational amplifier, internally compensated to provide gain
of +2 stability. The OPA651’s voltage feedback architecture
features true differential and fully symmetrical inputs. This
minimizes offset errors, making the OPA651 well suited for
implementing filter and instrumentation designs. The
OPA651’s AC performance is optimized to provide a gain
bandwidth product of 340MHz and a fast 0.1% settling time
of 11.5ns, which is an important consideration in high speed
data conversion applications. Along with its excellent settling
characteristics, the low DC input offset of
±
1mV and drift of
±
3
μ
V/
°
C support high accuracy requirements. In applica-
tions requiring a higher slew rate and wider bandwidth, such
as video and high bit rate digital communications, consider
the current feedback OPA658.
CIRCUIT LAYOUT AND BASIC OPERATION
Achieving optimum performance with a high frequency am-
plifier like the OPA651 requires careful attention to layout
parasitics and selection of external components. Recommen-
dations for PC board layout and component selection include:
a) Minimize parasitic capacitance
to any ac ground for all
of the signal I/O pins. Parasitic capacitance on the output
and inverting input pins can cause instability; on the non-
inverting input it can react with the source impedance to
cause unintentional bandlimiting. To reduce unwanted ca-
pacitance, a window around the signal I/O pins should be
opened in all of the ground and power planes. Otherwise,
ground and power planes should be unbroken elsewhere on
the board.
b) Minimize the distance
(< 0.25") from the two power pins
to high frequency 0.1
μ
F decoupling capacitors. At the pins,
the ground and power plane layout should not be in close
proximity to the signal I/O pins. Avoid narrow power and
ground traces to minimize inductance between the pins and
the decoupling capacitors. Larger (2.2
μ
F to 6.8
μ
F) decoupling
capacitors, effective at lower frequencies, should also be
used. These may be placed somewhat farther from the
device and may be shared among several devices in the same
area of the PC board.
c) Careful selection and placement of external compo-
nents will preserve the high frequency performance of the
OPA651
. Resistors should be a very low reactance type.
Surface mount resistors work best and allow a tighter overall
layout. Metal film or carbon composition axially-leaded
resistors can also provide good high frequency performance.
Again, keep their leads as short as possible. Never use
wirewound type resistors in a high frequency application.
Since the output pin and the inverting input pin are most
sensitive to parasitic capacitance, always position the feed-
back and series output resistor, if any, as close as possible to
the package pins. Other network components, such as non-
inverting input termination resistors, should also be placed
close to the package.
Even with a low parasitic capacitance shunting external
resistors, excessively high resistor values can create signifi-
cant time constants and degrade performance. This is par-
ticularly true for the OPA651 with its internal 1.5pF feed-
back capacitance. Good metal film or surface mount resis-
tors have approximately 0.2pF in shunt with the resistor. For
resistor values > 1.5k
, this adds a pole and/or zero below
500MHz that can affect circuit operation. Keep resistor
values as low as possible consistent with output loading
considerations. The 402
feedback used for the Typical
Performance Plots is a good starting point for design.
d) Connections to other wideband devices
on the board
may be made with short direct traces or through on-board
transmission lines. For short connections, consider the trace
and the input to the next device as a lumped capacitive load.
Relatively wide traces (50 to 100 mils) should be used,
preferably with ground and power planes opened up around
them. Estimate the total capacitive load and set R
ISO
from
the plot of recommended R
ISO
vs capacitive load. Low
parasitic loads may not need an R
ISO
since the OPA651 is
nominally compensated to operate with a 2pF parasitic load.
If a long trace is required and the 6dB signal loss intrinsic to
doubly terminated transmission lines is acceptable, imple-
ment a matched impedance transmission line using microstrip
or stripline techniques (consult an ECL design handbook for
microstrip and stripline layout techniques). A 50
environ-
ment is not necessary on board, and in fact a higher imped-
ance environment will improve distortion as shown in the
distortion vs load plot. With a characteristic impedance
defined based on board material and desired trace dimen-
sions, a matching series resistor into the trace from the
output of the amplifier is used as well as a terminating shunt
resistor at the input of the destination device. Remember
also that the terminating impedance will be the parallel
combination of the shunt resistor and the input impedance of
the destination device; the total effective impedance should
match the trace impedance. Multiple destination devices are
best handled as separate transmission lines, each with their
own series and shunt terminations.
If the 6dB attenuation loss of a doubly terminated line is
unacceptable, a long trace can be series-terminated at the
source end only. This will help isolate the line capacitance
from the op amp output, but will not preserve signal integrity
as well as a doubly terminated line. If the shunt impedance
at the destination end is finite, there will be some signal
attenuation due to the voltage divider formed by the series
and shunt impedances.
The OPA651 is nominally specified for operation using
±
5V
power supplies. A 10% tolerance on the supplies, or an ECL
–5.2V for the negative supply, is within the maximum speci-
fied total supply voltage of 11V. Higher supply voltages can
break down internal junctions possibly leading to catastrophic
failure. Single supply operation is possible as long as com-
mon mode voltage constraints are observed. The common
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| OPA656U | OP-AMP|SINGLE|BIPOLAR/JFET|SOP|8PIN|PLASTIC |
| OPA656UB | OP-AMP|SINGLE|BIPOLAR/JFET|SOP|8PIN|PLASTIC |
| OPA658N-250 | Current-Feedback Operational Amplifier |
| OPA658N-3K | Current-Feedback Operational Amplifier |
| OPA650B | Voltage-Feedback Operational Amplifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| OPA651U | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| OPA651U/2K5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| OPA651UB | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| OPA65250 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Wideband, Unity-Gain Stable, FET-Input OPERATIONAL AMPLIFIER |
| OPA652K5 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Wideband, Unity-Gain Stable, FET-Input OPERATIONAL AMPLIFIER |
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