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參數(shù)資料
| 型號： | OPA3684IDR |
| 英文描述： | Operational Amplifier |
| 中文描述： | 運算放大器 |
| 文件頁數(shù)： | 18/25頁 |
| 文件大?。?/td> | 448K |
| 代理商： | OPA3684IDR |
OPA3684
SBOS241A
18
www.ti.com
available output voltage and current will always be greater
than that shown in the over temperature specifications since
the output stage junction temperatures will be higher than the
minimum specified operating ambient.
To maintain maximum output stage linearity, no output short-
circuit protection is provided. This will not normally be a
problem since most applications include a series-matching
resistor at the output that will limit the internal power dissipa-
tion if the output side of this resistor is shorted to ground.
However, shorting the output pin directly to a power-supply
pin will, in most cases, destroy the amplifier. If additional
short-circuit protection is required, consider a small-series
resistor in the power-supply leads. This will, under heavy
output loads, reduce the available output voltage swing. A 5
series resistor in each power-supply lead will limit the internal
power dissipation to less than 1W for an output short-circuit
while decreasing the available output voltage swing only
0.25V for up to 50mA desired load currents. This slight drop
in available swing is more if multiple channels are driving
heavy loads simultaneously. Always place the 0.1
μ
F power-
supply decoupling capacitors after these supply current lim-
iting resistors directly on the supply pins. An alternative
approach is to place the 5
inside the loop at each output of
the amplifiers. This will provide some short-circuit protection,
but hurts the phase margin under capacitive load conditions.
DRIVING CAPACITIVE LOADS
One of the most demanding, and yet very common load
conditions, for an op amp is capacitive loading. Often, the
capacitive load is the input of an ADC
—
including additional
external capacitance which may be recommended to im-
prove ADC linearity. A high-speed, high open-loop gain
amplifier like the OPA3684 can be very susceptible to de-
creased stability and closed-loop response peaking when a
capacitive load is placed directly on the output pin. When the
amplifier
’
s open-loop output resistance is considered, this
capacitive load introduces an additional pole in the signal
path that can decrease the phase margin. Several external
solutions to this problem have been suggested. When the
primary considerations are frequency response flatness, pulse
response fidelity, and/or distortion, the simplest and most
effective solution is to isolate the capacitive load from the
feedback loop by inserting a series isolation resistor between
the amplifier output and the capacitive load. This does not
eliminate the pole from the loop response, but rather shifts it
and adds a zero at a higher frequency. The additional zero
acts to cancel the phase lag from the capacitive load pole,
thus increasing the phase margin and improving stability.
The Typical Characteristics show the recommended
“
R
S
vs
C
LOAD
”
and the resulting frequency response at the load. The
1k
resistor shown in parallel with the load capacitor is a
measurement path and may be omitted. Parasitic capacitive
loads greater than 5pF can begin to degrade the perfor-
mance of the OPA3684. Long PC board traces, unmatched
cables, and connections to multiple devices can easily cause
this value to be exceeded. Always consider this effect carefully,
and add the recommended series resistor as close as pos-
sible to the OPA3684 output pin (see Board Layout Guide-
lines).
DISTORTION PERFORMANCE
The OPA3684 provides very low distortion in a low-power
part. The CFB
PLUS
architecture also gives two significant
areas of distortion improvement. First, in operating regions
where the 2nd-harmonic distortion due to output stage
nonlinearities is very low (frequencies < 1MHz, low output
swings into light loads) the linearization at the inverting node
provided by the CFB
PLUS
design gives 2nd-harmonic distor-
tions that extend into the
–
90dBc region. Previous current-
feedback amplifiers have been limited to approximately
–
85dBc due to the nonlinearities at the inverting input. The
second area of distortion improvement comes in a distortion
performance that is largely gain independent. To the extent
that the distortion at a particular output power is output-stage
dependent, 3rd-harmonics particularly (and to a lesser ex-
tend 2nd-harmonic distortion) are constant as the gain is
increased. This is due to the constant loop-gain versus signal
gain provided by the CFB
PLUS
design. As shown in the
Typical Characteristic curves, while the 3rd-harmonic is con-
stant with gain, the 2nd-harmonic degrades at higher gains.
This is largely due to board parasitic issues. Slightly
imbalanced load return currents through the ground plane
will couple into the gain resistor to cause a portion of the 2nd-
harmonic distortion. At high gains, this imbalance has more
gain to the output giving reduced 2nd-harmonic distortion.
Differential stages using two of the channels together can
reduce this 2nd-harmonic issue enormously by getting back
to an essentially gain independent distortion.
Relative to alternative amplifiers with < 2mA/ch supply cur-
rent, the OPA3684 holds much lower distortion at higher
frequencies (> 5MHz) and to higher gains. Generally, until
the fundamental signal reaches very high frequency or power
levels, the 2nd-harmonic will dominate the distortion with a
lower 3rd-harmonic component. Focusing then on the 2nd-
harmonic, increasing the load impedance improves distortion
directly. Remember that the total load includes the feedback
network
—
in the noninverting configuration (see Figure 1) this
is the sum of R
F
+ R
G
, while in the inverting configuration it
is just R
F
. Also, providing an additional supply decoupling
capacitor (0.1
μ
F) between the supply pins (for bipolar opera-
tion) improves the 2nd-order distortion slightly (3dB to 6dB).
In most op amps, increasing the output voltage swing in-
creases harmonic distortion directly. A low-power part like
the OPA3684 includes quiescent boost circuits to provide the
large-signal bandwidth in the Electrical Characteristics. These
act to increase the bias in a very linear fashion only when
high slew rate or output power is required. This also acts to
actually reduce the distortion slightly at higher output power
levels. The Typical Characteristic curves show the 2nd-
harmonic holding constant from 500mVp-p to 5Vp-p outputs
while the 3rd-harmonics actually decrease with increasing
output power.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| OPA3684IDRG4 | 功能描述:高速運算放大器 Low-Power Triple Current Feedback RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 電壓增益 dB:116 dB 輸入補償電壓:0.5 mV 轉換速度:55 V/us 工作電源電壓:36 V 電源電流:7.5 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| OPA369 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:1.8V, 700nA, Zer?-Crossover RAIL-TO-RAIL I/O OPERATIONAL AMPLIFIER |
| OPA369_1 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:1.8V, 700nA, Zer?-Crossover RAIL-TO-RAIL I/O OPERATIONAL AMPLIFIER |
| OPA3690 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual, Wideband, High Output Current, Operational Amplifier with Current Limit |
| OPA3690ID | 功能描述:高速運算放大器 Triple Wideband Voltage-Feedback RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 電壓增益 dB:116 dB 輸入補償電壓:0.5 mV 轉換速度:55 V/us 工作電源電壓:36 V 電源電流:7.5 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
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