參數(shù)資料
型號: OPA3684IDR
英文描述: Operational Amplifier
中文描述: 運算放大器
文件頁數(shù): 17/25頁
文件大小: 448K
代理商: OPA3684IDR
OPA3684
SBOS241A
17
www.ti.com
transimpedance gain. The Typical Characteristics show this
open-loop transimpedance response. This is analogous to
the open-loop voltage gain curve for a voltage-feedback op
amp. Developing the transfer function for the circuit of Figure 14
gives Equation 1:
(1)
V
V
R
R
R
R
R
R
Z
NG
+
R
R NG
Z
NG
R
R
O
I
F
G
F
I
F
G
S
F
S
F
G
=
+
+
+
+
=
+
=
+
α
α
1
1
1
1
1
( )
( )
This is written in a loop-gain analysis format where the errors
arising from a non-infinite open-loop gain are shown in the
denominator. If Z
(S)
were infinite over all frequencies, the
denominator of Equation 1 would reduce to 1 and the ideal
desired signal gain shown in the numerator would be achieved.
The fraction in the denominator of Equation 1 determines the
frequency response. Equation 2 shows this as the loop-gain
equation.
Z
+
R
R NG
Loop Gain
S
F
( )
=
If 20
log(R
F
+ NG
R
I
) were drawn on top of the open-loop
transimpedance plot, the difference between the two would
be the loop gain at a given frequency. Eventually, Z
(S)
rolls off
to equal the denominator of Equation 2 at which point the
loop gain has reduced to 1 (and the curves have intersected).
This point of equality is where the amplifier
s closed-loop
frequency response given by Equation 1 will start to roll off,
and is exactly analogous to the frequency at which the noise
gain equals the open-loop voltage gain for a voltage-feed-
back op amp. The difference here is that the total impedance
in the denominator of Equation 2 may be controlled some-
what separately from the desired signal gain (or NG).
The OPA3684 is internally compensated to give a maximally
flat frequency response for R
F
= 800
at NG = 2 on
±
5V
supplies. That optimum value goes to 1.0k
on a single +5V
supply. Normally, with a current-feedback amplifier, it is
possible to adjust the feedback resistor to hold this band-
width up as the gain is increased. The CFB
PLUS
architecture
has reduced the contribution of the inverting input impedance
to provide exceptional bandwidth to higher gains without
adjusting the feedback resistor value. The Typical Character-
istics show the small-signal bandwidth over gain with a fixed
feedback resistor.
Putting a closed-loop buffer between the noninverting and
inverting inputs does bring some added considerations. Since
the voltage at the inverting output node is now the output of
a locally closed-loop buffer, parasitic external capacitance on
this node can cause frequency response peaking for the
transfer function from the noninverting input voltage to the
inverting node voltage. While it is always important to keep
the inverting node capacitance low for any current-feedback
op amp, it is critically important for the OPA3684. External
layout capacitance in excess of 2pF will start to peak the
frequency response. This peaking can be easily reduced by
increasing the feedback resistor value
but it is preferable,
from a noise and dynamic range standpoint, to keep that
capacitance low, allowing a close to nominal 800
feedback
resistor for flat frequency response. Very high parasitic
capacitance values on the inverting node (> 5pF) can possi-
bly cause input stage oscillation that cannot be filtered by a
feedback element adjustment.
At very high gains, 2nd-order effects in the inverting output
impedance cause the overall response to peak up. If desired,
it is possible to retain a flat frequency response at higher
gains by adjusting the feedback resistor to higher values as
the gain is increased. Since the exact value of feedback that
will give a flat frequency response depends strongly in
inverting and output node parasitic capacitance values, it is
best to experiment in the specific board with increasing
values until the desired flatness (or pulse response shape) is
obtained. In general, increasing R
F
(and adjusting R
G
to the
desired gain) will move towards flattening the response,
while decreasing it will extend the bandwidth at the cost of
some peaking.
OUTPUT CURRENT AND VOLTAGE
The OPA3684 provides output voltage and current capabili-
ties that can support the needs of driving doubly-terminated
50
lines. For a 100
load at the gain of +2 (see Figure 1),
the total load is the parallel combination of the 100
load and
the 1.6k
total feedback network impedance. This 94
load
will require no more than 40mA output current to support
the
±
3.8V minimum output voltage swing specified for
100
loads. This is well under the specified minimum
+110mA/
90mA output current specifications over the full
temperature range.
The specifications described above, though familiar in the
industry, consider voltage and current limits separately. In
many applications, it is the voltage
current, or V-I product,
which is more relevant to circuit operation. Refer to the
Output Voltage and Current Limitations
curve in the Typical
Characteristics. The X- and Y-axes of this graph show the
zero-voltage output current limit and the zero-current output
voltage limit, respectively. The four quadrants give a more
detailed view of the OPA3684
s output drive capabilities.
Superimposing resistor load lines onto the plot shows the
available output voltage and current for specific loads.
The minimum specified output voltage and current over
temperature are set by worst-case simulations at the cold
temperature extreme. Only at cold startup will the output
current and voltage decrease to the numbers shown in the
Electrical Characteristic tables. As the output transistors
deliver power, their junction temperatures will increase,
decreasing their V
BE
s (increasing the available output
voltage swing) and increasing their current gains (increasing
the available output current). In steady-state operation, the
(2)
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