參數(shù)資料
型號: OPA2634
英文描述: Dual, Wideband, Single-Supply OPERATIONAL AMPLIFIER
中文描述: 雙路,寬帶,單電源運算放大器
文件頁數(shù): 10/16頁
文件大?。?/td> 155K
代理商: OPA2634
10
OPA2634
APPLICATIONS INFORMATION
WIDEBAND VOLTAGE FEEDBACK OPERATION
The OPA2634 is a unity-gain stable, very high-speed, volt-
age-feedback op amp designed for single-supply operation
(+3V to +5V). The input stage supports input voltages below
ground, and within 1.2V of the positive supply. The comple-
mentary common-emitter output stage provides an output
swing to within 30mV of ground and 140mV of the positive
supply. It is compensated to provide stable operation with a
wide range of resistive loads.
Figure 1 shows the AC-coupled, gain of +2 configuration
used for the +5V Specifications and Typical Performance
Curves. For test purposes, the input impedance is set to 50
with a resistor to ground. Voltage swings reported in the
Specifications are taken directly at the input and output pins.
For the circuit of Figure 1, the total effective load on the
output at high frequencies is 150
|| 1500
. The 1.50k
resistors at the non-inverting input provide the common-
mode bias voltage. Their parallel combination equals the DC
resistance at the inverting input, minimizing the DC offset.
FIGURE 1. AC-Coupled Signal—Resistive Load to Supply
Midpoint.
1/2
OPA2634
+V
S
= 3V
V
OUT
57.6
V
IN
562
374
2.26k
R
L
150
+V
S
2
750
6.8
μ
F
+
0.1
μ
F
+
FIGURE 2. DC-Coupled Signal—Resistive Load to Supply
Midpoint.
supply capability of both the ADC and its driver. The
OPA2634 provides excellent performance in this demanding
application. Its large input and output voltage ranges, and
low distortion, support converters such as the ADS900
shown in this figure. The input level-shifting circuitry was
designed so that V
IN
can be between 0V and 0.5V, while
producing a 1V to 2V at the output pin for the ADS900.
ANTI-ALIASING FILTER
Figure 3 shows an anti-aliasing filter, with a 5th-order
Inverse Chebyshev response, based on a single OPA2634.
This filter cascades two 2nd-order Sallen-Key sections with
transmission zeros, and a real pole section. It has a –3dB
1/2
OPA2634
191
V
IN
20
100
215
210
680pF
1% Resistors
5% Capacitors
10pF
56pF
220pF
18pF
330pF
330pF
680pF
68.1
1/2
OPA2634
48.7
20
115
93.1
V
OUT
150pF
205
Figure 2 shows the DC-coupled, gain of +2 configuration
used for the +3V Specifications and Typical Performance
Curves. For test purposes, the input impedance is set to 50
with a resistor to ground. Though not strictly a “rail-to-rail”
design, this part comes very close, while maintaining excel-
lent performance. It will deliver up to 2.8Vp-p on a single
+3V supply with > 100MHz small-signal bandwidth. The
374
and 2.26k
resistors at the input level-shift V
IN
so
that V
OUT
is within the allowed output voltage range when
V
IN
= 0. See the Typical Performance Curves for informa-
tion on driving capacitive loads.
SINGLE-SUPPLY ADC INTERFACE
The front page shows a DC-coupled, single-supply, dual
ADC driver circuit. Many systems are now requiring +3V
FIGURE 3. Inverse Chebyshev Anti-Aliasing Filter.
1/2
OPA2634
+V
S
= 5V
V
OUT
53.6
V
IN
750
1.50k
1.50k
R
L
150
+V
S
2
750
6.8
μ
F
+
0.1
μ
F
0.1
μ
F
0.1
μ
F
+
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