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參數(shù)資料
| 型號： | OM6211U |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 48 X 84 dot matrix LCD driver |
| 中文描述： | 48 × 84點陣LCD驅(qū)動器 |
| 文件頁數(shù)： | 31/48頁 |
| 文件大小： | 243K |
| 代理商： | OM6211U |
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2002 Jan 17
31
Philips Semiconductors
Product specification
48
×
84 dot matrix LCD driver
OM6211
18.5
Serial interface commands
These instructions are in addition to those indicated in Table 5.
Table 11
Additional instructions
INSTRUCTION
D/C
COMMAND BYTE
ACTION
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Enable OTP
CALMM
Load factory
default
Power control
(refresh)
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
0
1
1
1
1
0
1
1
0
enable OTP circuitry
enter CALMM mode
load MMOTPVOP
7
to
MMOTPVOP
0
into V
PR
register
set HVE; force a refresh of the
shift register
0
0
0
1
0
1
HVE
HVE
HVE
18.5.1
E
NABLE
OTP
This is a special instruction for the OM6211 which enables
all included OTP circuitry. Once enabled the mode can
only be disabled via a reset.
18.5.2
CALMM
This instruction puts the device into the calibration mode.
This mode enables the shift register for loading and allows
programming of the non-volatile OTP cells to take place. If
the seal bit is set then this mode cannot be accessed and
the instruction will be ignored. Once in calibration mode all
commandsareinterpretedasshiftregisterdata.Themode
can only be exited by sending data with bit DB7 set to
logic 0. A reset will also clear this mode. Each shift register
databyteisprecededbyD/C = 0andhasonly2 significant
bits, thus the remaining 6 bits are ignored. Bit DB7 is the
continuation bit (DB7 = 1 remain in CALMM mode,
DB7 = 0 exit CALMM mode). Bit DB0 is the data bit and its
value is shifted into the OTP shift register (on the falling
edge of SCLK).
18.5.3
L
OAD FACTORY DEFAULT
The ‘Load factory default’ instruction is used to transfer the
contents of the OTP shift register bits MMOTPVOP
7
to
MMOTPVOP
0
into the normal working register of V
PR
;
see Fig.21. This is opposite to the calibration register
MMVOPCAL
4
to MMVOPCAL
0
which is active
immediately after a refresh.
18.5.4
R
EFRESH
The action of the ‘Refresh’ instruction is to force the OTP
shift register to re-load from the non-volatile OTP cells.
This instruction takes up to 5 ms to complete.
During this time all other instructions may be sent,
however, instructions requiring the output of the shift
register (‘Load factory default’) should be avoided as the
register contents may not be valid.
In the OM6211 the ‘Refresh’ instruction is associated to
the ‘Set HVE’ instruction so that the shift register is
automatically refreshed every time the high voltage
generator is enabled or disabled. It should be noted
however,thatifthisinstructionissentwhileinPower-down
mode, then the HVE bit is updated but the refreshing is
ignored.
18.6
Example of filling the shift register
An example sequence of commands and data is shown in
Table 12. In this example the shift register is filled with the
following data: MMVOPCAL =
4 (11100B),
MMOTPVOP = 19 (00010011B) and the seal bit is 0.
It is assumed that the OM6211 has just been reset. After
transmitting the last bit the OM6211 can exit or remain in
CALMM mode (see step 18). It should be noted that while
in CALMM mode the interface does not recognize
commands in the normal sense.
After this sequence has been applied it is possible to
observe the impact of the data shifted in. This sequence is,
however, not useful for OTP programming because the
number of bits with the value ‘1’ is greater than that
allowed for programming (see Section 18.7). Figure 23
shows the shift register after this action.
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