參數(shù)資料
型號: NT68F62
廠商: Electronic Theatre Controls, Inc.
英文描述: 8-Bit Microcontroller for Monitor (32K Flash MTP Type)
中文描述: 8位微控制器的監(jiān)視器(32K閃存中期型)
文件頁數(shù): 14/57頁
文件大小: 521K
代理商: NT68F62
NT68F62
14
8. A/D Converters
The structure of these analog to digital converters is 6-bit
successive approximation. Analog voltage is supplied from
external sources to the A/D input pins and the result of the
conversion is stored in the 6-bit data latch registers ($0011
& $0014). The A/D channels are activated by clearing the
correspondent control bits in the ENADC control register.
When users write '0' into one of the enabled control bits, its
correspondent I/O pin or DAC will be switched to the A/D
converter input pin (ADC0 & ADC1 are shared with
PORT10 & PORT 11; ADC2 & ADC3 are shared with
DAC0 & DAC1). Conversion will be started by clearing the
CSTA
bit (CONVERSION START) in the ENADC control
register. When the conversion is finished, the system will
set this INTADC bit. Users can monitor this bit to get the
valid A/D conversion data in the AD latch registers ($0011 -
$0014). Users can also open the interrupt sources to
remind users to get the stable digital data. Notice that only
at the activated A/D channel, its latched data are available.
The analog voltage to be measured should be stable during
the conversion operation and the variation must not exceed
LSB for the best accuracy in measurement.
Addr.
Register
INIT
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
R/W
$0010
ENADC
FFH
CSTA
ENADC3
ENADC2
ENADC1
ENADC0
W
$0011
AD0 REG
C0H
AD05
AD04
AD03
AD02
AD01
AD00
R
$0012
AD1 REG
00H
AD15
AD14
AD13
AD12
AD11
AD10
R
$0013
AD2 REG
00H
AD25
AD24
AD23
AD22
AD21
AD20
R
$0014
AD3 REG
00H
AD35
AD34
AD33
AD32
AD31
AD30
R
$001B
IEIRQ2
00H
INTADC
INTV
INTE1
INTMR
R/W
$001E
IRQ2
00H
INTADC
INTV
INTE1
INTMR
R
CLRADC
CLRV
CLRE1
CLRMR
W
Reference ADC Table
(V
DD
= 5.0V)
15
1.50V
1C
2.06V
23
2.59V
2A
3.14V
16
1.58V
1D
2.12V
24
2.67V
2B
3.22V
17
1.66V
1E
2.20V
25
2.75V
2C
3.30V
18
1.74V
1F
2.28V
26
2.82V
2D
3.38V
19
1.82V
20
2.35V
27
2.91V
2E
3.46V
1A
1.90V
21
2.44V
28
2.98V
2F
3.54V
1B
1.98V
22
2.51V
29
3.07V
30
3.62V
Note: It is strongly recommended that the ADC’s input signal should be allocated within the ADC’s linear voltage
range (1.5V~3.5V) to obtain a stable digital value. Do not use the outer ranges (0V~1.4V & 3.6V~5.0V) in which
the converted digital value is not guaranteed.
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