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參數(shù)資料
| 型號： | NT68F62 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 8-Bit Microcontroller for Monitor (32K Flash MTP Type) |
| 中文描述： | 8位微控制器的監(jiān)視器（32K閃存中期型） |
| 文件頁數(shù)： | 13/57頁 |
| 文件大小： | 521K |
| 代理商： | NT68F62 |
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NT68F62
13
6. Timing Generator
This block generates the system timing and control signals
to be supplied to the CPU and on-chip peripherals. A
crystal quartz, ceramic resonator, or an external clock
signal which will be provided to the OSCI pin generates
system timing. It generates 8MHz for the system clock and
4MHz for the CPU. Although internal circuits have a
feedback resistor and compacitor included, users can
externally add these components for proper operating.
The typical clock frequency is 8MHz. Different frequencies
will affect the operation of those on-chip peripherals whose
operating frequency is based on the system clock.
8MHz
OSCI
OSCO
NT68F62
OSCI
NT68F62
Figure 6.1. Oscillator Connections
(1)
(2)
Unconnected
External Clock
OSCO
7. RESET
The NT68F62 can be reset by the external reset pin or by
the internal watch-dog timer. This is used to reset or start
the microcontroller from a POWER DOWN condition.
During the time that this reset pin is held LOW (*reset line
must be held LOW for at least two CPU clock cycles),
writing to or from the
μ
C is inhibited. When a positive edge
is detected on the RESET input, the
μ
C will immediately
begin the reset sequence.
After a system initialization time of six CPU clock cycles,
the mask interrupt flag will be set and the
μ
C will load the
program counter from the memory vector locations $FFFC
and $FFFD. This is the start location for program control.
An internal Schmitt Trigger buffer at the
RESET
pin is
provided to improve noise immunity.
The reset status is as follows:
1. PORT0
、
PORT1
、
PORT2
、
PORT3 (& PORT4) pins
will act as I/O ports with HIGH output
2. Sync processor counters reset and VCNT | HCNT
latches cleared
3. All sync outputs are disabled
4. Base timer is disabled and cleared
5. Various Interrupt sources are disabled and cleared
6. A/D converter is disabled and stopped
7. DDC1/2B+ function is disabled
8. PWM DAC0 – DAC6 output 50% duty waveform and
DAC7 - DAC12 is disabled
9. Watch-dog timer is cleared and enabled
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NT68F62U | 8-Bit Microcontroller for Monitor (32K Flash MTP Type) |
| NT68P61A | 8-Bit Microcontroller for Monitor (24K OTP ROM Type) |
| NT68P62 | 8-Bit Microcontroller for Monitor (32K OTP ROM Type) |
| NT68P62-01 | 8-Bit Microcontroller for Monitor (32K OTP ROM Type) |
| NT68P62U | 8-Bit Microcontroller for Monitor (32K OTP ROM Type) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NT68F62U | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller for Monitor (32K Flash MTP Type) |
| NT68P61A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller for Monitor (24K OTP ROM Type) |
| NT6C34CA | 制造商:ASTEC 功能描述: 制造商:Emerson Network Power - Embedded Power 功能描述: |
| NT6DM32M16AD-T1 | 制造商:Nanya Technology Corporation 功能描述:MOBILE DRAM |
| NT6DM32M16BD-T1 | 制造商:NANYA TECHNOLOGY 功能描述:512M LPDDR SDRAM, 32Mx16, 200MHz 制造商:NANYA TECHNOLOGY 功能描述:NT6DM32 Series 1.8 V 512 Mb (32 Mb x 16) 200 MHz SDRAM - FBGA-60 |
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