參數(shù)資料
型號(hào)： NT256D64S88A2GM-75B
廠商： Electronic Theatre Controls, Inc.
英文描述： 200pin One Bank Unbuffered DDR SO-DIMM
中文描述： 200pin一個(gè)銀行緩沖的DDR SO - DIMM插槽
文件頁數(shù)： 10/14頁
文件大?。?/td> 210K
代理商： NT256D64S88A2GM-75B
NT256D64S88A2GM
256MB : 32M x 64
PC2100 / PC1600 Unbuffered DDR SO-DIMM
Operating, Standby, and Refresh Currents
Preliminary
01 / 2002
10
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
( T
A
= 0 °C ~ 70 °C ; V
DDQ
= 2.5V ± 0.2V; V
DD
= 2.5V ± 0.2V, See AC Characteristics)
Symbol
Parameter/Condition
PC1600
PC2100
Unit
Notes
I
DD0
Operating Current : one bank; active / precharge; t
RC
= t
RC (MIN)
;
t
CK
= t
CK (MIN)
; DQ, DM, and DQS inputs changing twice per clock cycle;
address and control inputs changing once per clock cycle
Operating Current : one bank; active / read / precharge; Burst = 2;
t
RC
= t
RC (MIN)
; CL=2.5; t
CK
= t
CK (MIN)
; I
OUT
= 0mA;
address and control inputs changing once per clock cycle
Precharge Power-Down Standby Current :
all banks idle; power-down mode; CKE
≤
V
IL (MAX)
; t
CK
= t
CK (MIN)
Idle Standby Current :
CS
≥
V
IH (MIN)
; all banks idle; CKE
≥
V
IH(MIN)
;
t
CK
= t
CK (MIN)
; address and control inputs changing once per clock cycle
Active Power-Down Standby Current : one bank active;
power-down mode; CKE
≤
V
IL (MAX)
; t
CK
= t
CK (MIN)
Active Standby Current : one bank; active / precharge; CS
≥
V
IH (MIN)
;
CKE
≥
V
IH (MIN)
; t
RC
= t
RAS (MAX)
; t
CK
= t
CK (MIN)
; DQ, DM, and DQS
inputs changing twice per clock cycle;
address and control inputs changing once per clock cycle
Operating Current :
one bank; Burst = 2; reads; continuous burst;
address and control inputs changing once per clock cycle;
DQ and DQS outputs changing twice per clock cycle; CL = 2.5;
t
CK
= t
CK (MIN)
; I
OUT
= 0mA
Operating Current : one bank; Burst = 2; writes; continuous burst;
address and control inputs changing once per clock cycle;
DQ and DQS inputs changing twice per clock cycle; CL=2.5;
t
CK
= t
CK (MIN)
600
680
mA
1,2
I
DD1
720
880
mA
1,2
I
DD2P
120
120
mA
1,2
I
DD2N
240
280
mA
1,2
I
DD3P
120
120
mA
1,2
I
DD3N
400
480
mA
1,2
I
DD4R
1040
1320
mA
1,2
I
DD4W
920
1200
mA
1,2
t
RC
= t
RFC (MIN)
t
RC
= 7.8
μ
s
1280
132
1360
132
mA
mA
1,2
1,2,4
I
DD5
Auto-Refresh Current :
I
DD6
1. I
DD
specifications are tested after the device is properly initialized.
2. Input slew rate = 1V/ ns .
3. Enables on-chip refresh and address counters.
4. Current at 7.8 μs is time averaged value of I
DD5
at t
RFC (MIN)
and I
DD2P
over 7.8 μs.
Self-Refresh Current : CKE
≤
.2V
24
24
mA
1,2,3
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
NT256D64S88A2GM-7K 制造商:未知廠家 制造商全稱:未知廠家 功能描述:200pin One Bank Unbuffered DDR SO-DIMM
NT256D64S88A2GM-8B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:200pin One Bank Unbuffered DDR SO-DIMM
NT256D64S88AAG 制造商:未知廠家 制造商全稱:未知廠家 功能描述:184pin One Bank Unbuffered DDR SDRAM MODULE
NT256D64S88AAG-75B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:184pin One Bank Unbuffered DDR SDRAM MODULE
NT256D64S88AAG-7K 制造商:未知廠家 制造商全稱:未知廠家 功能描述:184pin One Bank Unbuffered DDR SDRAM MODULE
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