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參數(shù)資料
| 型號： | NT256D64S8HA0G-6 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 184pin Two Bank Unbuffered DDR SDRAM MODULE |
| 中文描述： | 184pin兩個銀行無緩沖DDR SDRAM內存模塊 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 195K |
| 代理商： | NT256D64S8HA0G-6 |
NT256D64S8HA0G-6
256MB : 32M x 64
PC2700 Unbuffered DIMM
184pin Two Bank
Unbuffered DDR SDRAM MODULE
Based on DDR333 16Mx8 SDRAM
Features
184-Pin Unbuffered 8-Byte Dual In-Line Memory Module
32Mx64 Double Data Rate (DDR) SDRAM DIMM
Performance :
PC2700
Speed Sort
-6
DIMM
CAS
Latency
2.5
2
f
CK
Clock Frequency
166
133
MHz
t
CK
Clock Cycle
6
7.5
ns
f
DQ
DQ Burst Frequency
333
266
MHz
Intended for 166 MHz and 133 MHz applications
Inputs and outputs are SSTL-2 compatible
V
DD
= 2.5Volt ±
0.2, V
DDQ
= 2.5Volt ± 0.2
Single Pulsed
RAS
interface
SDRAMs have 4 internal banks for concurrent operation
Module has two physical banks
Differential clock inputs
Data is read or written on both clock edges
Description
NT256D64S8HA0G-6 is an unbuffered 184-Pin Double Data Rate (DDR) Synchronous DRAM Dual In-Line Memory Module (DIMM),
Preliminary,
11/2001
1
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
Unit
DRAM D
LL
aligns DQ and DQS transitions with clock transitions.
Also aligns QFC transitions with clock during Read cycles
Address and control signals are fully synchronous to positive
clock edge
Programmable Operation:
- DIMM
CAS
Latency: 2, 2.5
- Burst Type: Sequential or Interleave
- Burst Length: 2, 4, 8
- Operation: Burst Read and Write
Auto Refresh (CBR) and Self Refresh Modes
Automatic and controlled precharge commands
12/10/2 Addressing (row/column/bank)
15.6
μ
s Max. Average Periodic Refresh Interval
Serial Presence Detect
Gold contacts
SDRAMs in 66-pin TSOP Type II Package
organized as a dual-bank high-speed memory array. The 32Mx64 module is a two-bank DIMM that uses sixteen 16Mx8 DDR
SDRAMs in 400 mil TSOP packages. The DIMM achieves high-speed data transfer rates of up to 333MHz. The DIMM is intended for use
in applications operating from 133 MHz to 166 MHz clock speeds with data rates of 266 to 333 MHz. Clock enable CKE0 and / or CKE1
controls all devices on the DIMM.
Prior to any access operation, the device
CAS
latency and burst type/ length/operation type must be programmed into the DIMM by
address inputs A0-A11 and I/O inputs BA0 and BA1 using the mode register set cycle.
These DIMMs are manufactured using raw cards developed for broad industry use as reference designs. The use of these common
design files minimizes electrical variation between suppliers.
The DIMM uses serial presence detects implemented via a serial EEPROM using the two-pin IIC protocol. The first 128 bytes of serial PD
data are programmed and locked during module assembly. The last 128 bytes are available to the customer.
All NANYA 184 DDR SDRAM DIMMs provide a high-performance, flexible 8-byte interface in a 5.25” long space-saving footprint.
Ordering Information
Part Number
Speed
Organization
Leads
Power
166MHz (7ns @ CL = 2.5 )
NT256D64S8HA0G-6
133MHz (7.5ns @ CL= 2 )
PC2700
32Mx64
Gold
2.5V
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| NT256D64S8HA0G-75B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:184pin Two Bank Unbuffered DDR SDRAM MODULE |
| NT256D64S8HA0G-7K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:184pin Two Bank Unbuffered DDR SDRAM MODULE |
| NT256D64S8HA0G-8B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:184pin Two Bank Unbuffered DDR SDRAM MODULE |
| NT256D64SH8B0GM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:200pin Unbuffered DDR SO-DIMM |
| NT256D64SH8B0GM-75B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:200pin Unbuffered DDR SO-DIMM |
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