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Functional Description
(Continued)
MODE SELECTION
The modes of operation of the NM27LV210 are listed in Table 1. A single power supply is required in the read mode. All inputs are TTL
levels except for V
PP
and A9 for device signature.
TABLE 1. Modes Selection
Pins
CE
OE
PGM
V
PP
V
CC
Outputs
Mode
Read
V
IL
V
IL
X
X
3.3V
D
OUT
(Note 16)
Output Disable
X
V
IH
X
X
3.3V
High Z
Standby
V
IH
X
X
X
3.3V
High Z
Programming
V
IL
V
IH
V
IL
12.75V
6.25V
D
IN
Program Verify
V
IL
V
IL
V
IH
12.75V
6.25V
D
OUT
Program Inhibit
V
IH
X
X
12.75V
6.25V
High Z
Note 16:
X can be V
IL
or V
IH
.
Program Inhibit
Programming multiple EPROM’s in parallel with different data is
also easily accomplished. Except for CE all like inputs (including
OE and PGM) of the parallel EPROM may be common. A TTL low
level program pulse applied to an EPROM’s PGM input with CE at
V
and V
at 12.75V will program that EPROM. A TTL high level
CE input inhibits the other EPROM’s from being programmed.
Program Verify
A verify should be performed on the programmed bits to determine
whether they were correctly programmed. The verify may be
performed with V
at 6.25V. V
must be at V
CC
, except during
programming and program verify.
MANUFACTURER’S IDENTIFICATION CODE
The EPROM has a manufacturer’s identification code to aid in
programming. When the device is inserted in an EPROM pro-
grammer socket, the programmer reads the code and then
automatically calls up the specific programming algorithm for the
part. This automatic programming control is only possible with
programmers which have the capability of reading the code.
The Manufacturer’s Identification code, shown in Table 2, specifi-
cally identifies the manufacturer and device type. The code for the
NM27LV210 is “8FD6”, where “8F” designates that it is made by
Fairchild Semiconductor, and “D6” designates a 1 Megabit (64K
x 16) part.
The code is accessed by applying 12V
±
0.5V to address pin A9 .
Addresses A1 –A8 ,A10 –A15 , and all control pins are held at V
IL
.
Address pin A0 is held at V
for the manufacturer’s code, and held
at V
for the device code. The code is read on the lower eight data
pins, O0 –07 . Proper code access is only guaranteed at 25
°
C
±
5
°
C.
SYSTEM CONSIDERATION
The power switching characteristics of EPROMs require careful
decoupling of the devices. The supply current, I
, has three
segments that are of interest to the system designer: the standby
current level, the active current level, and the transient current
peaks that are produced by voltage transitions on input pins. The
magnitude of these transient current peaks is dependent on the
output capacitance loading of the device. The associated V
CC
transient voltage peaks can be suppressed by properly selected
decoupling capacitors. It is recommended that at least a 0.1
μ
F
ceramic capacitor be used on every device between V
CC
and
GND. This should be a high frequency capacitor of low inherent
inductance. In addition, at least a 4.7
μ
F bulk electrolytic capacitor
should be used between V
CC
and GND for each eight devices. The
bulk capacitor should be located near where the power supply is
connected to the array. The purpose of the bulk capacitor is to
overcome the voltage drop caused by the inductive effects of the
PC board traces.
TABLE 2. Manufacturer’s Identification Code
Pins
A0
(21)
A9
(31)
O7
(12)
O6
(13)
O5
(14)
O4
(15)
O3
(16)
O2
(17)
O1
(18)
O0
(19)
Hex
Data
Manufacturer Code
V
IL
12V
1
0
0
0
1
1
1
1
8F
Device Code
V
IH
12V
1
1
0
1
0
1
1
0
D6