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參數(shù)資料
| 型號： | NM27LV210 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 1,048,576-Bit (64K x 16) Low Voltage EPROM |
| 中文描述： | 1,048,576位（64K的× 16）低電壓存儲器 |
| 文件頁數(shù)： | 4/9頁 |
| 文件大?。?/td> | 77K |
| 代理商： | NM27LV210 |
4
www.fairchildsemi.com
N
AC Test Conditions
Output Load
1 TTL Gate and C
L
= 100 pF (Note 9)
Input Rise and Fall Times
≤
5 ns
Input Pulse Levels
0.45V to 2.4V
Timing Measurement Reference Level
Inputs
Outputs
0.8V and 2V
0.8V and 2V
AC Waveforms
(Note 7) (Note 8) (Note 10)
Note 2:
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Note 3:
This parameter is only sampled and is not 100% tested.
Note 4:
OE may be delayed up to t
ACC
- t
OE
after the falling edge of CE without impacting t
ACC
.
Note 5:
The t
and t
compare level is determined as follows:
High to TRI-STATE
, the measured V
OH1
(DC) - 0.10V;
Low to TRI-STATE, the measured V
OL1
(DC) + 0.10V.
Note 6:
TRI-STATE may be attained using OE or CE.
Note 7:
The power switching characteristics of EPROMs require careful device decoupling. It is recommended that at least a 0.1
μ
F ceramic capacitor be used on every device
between V
CC
and GND.
Note 8:
The outputs must be restricted to V
CC
+ 1.0V to avoid latch-up and device damage.
Note 9:
1 TTL Gate: I
= 1.6 mA, I
= -400
μ
A.
C
L
: 100 pF includes fixture capacitance.
Note 10:
V
PP
may be connected to V
CC
except during programming.
Note 11:
Inputs and outputs can undershoot to -2.0V for 20 ns Max.
Programming Characteristics
(Note 12) (Note 13) (Note 14) (Note 15)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
AS
Address Setup Time
1
μ
s
t
OES
OE Setup Time
1
μ
s
t
CES
CE Setup Time
OE = V
IH
1
μ
s
t
DS
Data Setup Time
1
μ
s
t
VPS
V
PP
Setup Time
1
μ
s
t
VCS
V
CC
Setup Time
1
μ
s
t
AH
Address Hold Time
0
μ
s
t
DH
Data Hold Time
1
μ
s
t
DF
Output Enable to Output Float Delay
CE = V
IL
0
60
ns
Address Valid
Valid Output
2.0V
0.8V
2.0V
0.8V
2.0V
0.8V
ADDRESS
OUTPUT
CE
OE
tCE
2.0V
0.8V
(Note 3)
(Note 3)
tDF
(Note 4, 5)
(Note 4, 5)
tDH
Hi-Z
tOE
ACC
t
CF
t
Hi-Z
DS011376-4
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| NM27LV210T200 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 EPROM |
| NM27LV210T250 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 EPROM |
| NM27LV210T300 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 EPROM |
| NM27LV210TE250 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 EPROM |
| NM27LV210TE300 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 EPROM |
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