參數(shù)資料
型號: NM27LV210
廠商: Fairchild Semiconductor Corporation
英文描述: 1,048,576-Bit (64K x 16) Low Voltage EPROM
中文描述: 1,048,576位(64K的× 16)低電壓存儲器
文件頁數(shù): 5/9頁
文件大?。?/td> 77K
代理商: NM27LV210
5
www.fairchildsemi.com
N
Programming Characteristics
(Note 12) (Note 13) (Note 14) (Note 15) (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PW
Program Pulse Width
45
50
105
μ
s
t
OE
Data Valid from OE
CE = V
IL
100
ns
I
PP
V
Supply Current during
Programming Pulse
CE = V
PGM = V
IL
40
mA
I
CC
V
CC
Supply Current
50
mA
T
A
Temperature Ambient
20
25
30
°
C
V
CC
Power Supply Voltage
6.25
6.5
6.75
V
V
PP
Programming Supply Voltage
12.5
12.75
13.0
V
t
FR
Input Rise, Fall Time
5
ns
V
IL
Input Low Voltage
0.0
0.45
V
V
IH
Input High Voltage
2.4
4.0
V
t
IN
Input Timing Reference Voltage
0.8
2.0
V
t
OUT
Output Timing Reference Voltage
0.8
2.0
V
Programming Waveforms
(Note 14)
Note 12:
Fairchild’s standard product warranty applies only to devices programmed to specifications described herein.
Note 13:
V
must be applied simultaneously or before V
PP
and removed simultaneously or after V
PP
. The EPROM must not be inserted into or removed from a board with
voltage applied to V
PP
or V
CC
.
Note 14:
The maximum absolute allowable voltage which may be applied to the V
pin during programming is 14V. Care must be taken when switching the V
supply to
prevent any overshoot from exceeding this 14V maximum specification. At least a 0.1
μ
F capacitor is required across V
PP
, V
CC
to GND to suppress spurious voltage transients
which may damage the device.
Note 15:
During power up the PGM pin must be brought high (
V
IH
) either coincident with or before power is applied to V
PP
.
tAS
Program
Program Verify
Address N
tDF
Hi-Z
tDS
tDH
tVCS
tVPS
tPW
tOES
tOE
2.0V
0.8V
2.0V
0.8V
6.25V
12.75V
2.0V
0.8V
2.0V
0.8V
Addresses
Data
OE
CE
VCC
VPP
0.8V
PGM
tCES
Data Out Valid
ADD N
Data In Stable
ADD N
DS011376-5
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