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參數(shù)資料
| 型號(hào)： | NIMD6302R2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類(lèi)： | 小信號(hào)晶體管 |
| 英文描述： | HDPlus Dual N-Channe Self-protected Field Effect Transistors with 1:200 Current Mirror FET |
| 中文描述： | 6500 mA, 30 V, 4 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET |
| 封裝： | CASE 751-07, SOIC-8 |
| 文件頁(yè)數(shù)： | 1/12頁(yè) |
| 文件大?。?/td> | 97K |
| 代理商： | NIMD6302R2 |
Semiconductor Components Industries, LLC, 2002
October, 2002 – Rev. 3
1
Publication Order Number:
NIMD6302R2/D
NIMD6302R2
HDPlus Dual N-Channel
Self-protected Field Effect
Transistors with 1:200
Current Mirror FET
HDPlus devices are an advanced HDTMOS
series of power
MOSFET which utilize ON’s latest MOSFET technology process to
achieve the lowest possible on–resistance per silicon area while
incorporating smart features. They are capable of withstanding high
energy in the avalanche and commutation modes. The avalanche
energy is specified to eliminate guesswork in designs where inductive
loads are switched and offer additional safety margin against
unexpected voltage transients.
This HDPlus device features an integrated Gate–to–Source clamp
for ESD protection. Also, this device features a mirror FET for current
monitoring.
±
3.5% Current Mirror Accuracy in Linear Region
±
15% Current Mirror Accuracy in Low Current Saturation Region
IDSS Specified at Elevated Temperature
Avalanche Energy Specified
Current Sense FET
ESD Protected on the Main and the Mirror FET
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed may cause permanent damage to the device.
These are stress ratings only and functional operation of the device at these
or any other conditions beyond those indicated in this specification is not
implied. Exposure to absolute maximum rated conditions for extended peri-
ods may affect device reliability.
MAIN MOSFET MAXIMUM RATINGS
(T
J
= 25
°
C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–to–Source Voltage
V
DSS
V
DGR
V
GS
30
Vdc
Drain–to–Gate Voltage (R
GS
= 1.0 M )
Gate–to–Source Voltage
30
Vdc
16
Vdc
Drain Current
– Continuous @ T
A
= 25
°
C
– Continuous @ T
A
= 100
°
C (Note 3)
– Pulsed (t
p
10 s)
Total Power Dissipation @ T
A
= 25
°
C (Note 1)
Total Power Dissipation @ T
A
= 25
°
C (Note 2)
I
D
I
D
I
DM
P
D
P
D
6.5
4.4
33
Adc
Adc
Apk
1.3
1.67
W
Thermal Resistance
Junction–to–Ambient (Note 1)
Junction–to–Ambient (Note 2)
R
JA
R
JA
E
AS
96
75
°
C/W
Single Pulse Drain–to–Source Avalanche
Energy (Note 3)
(V
DD
= 25 Vdc, V
GS
= 10 Vdc,
V
DS
= 20 Vdc, I
L
= 15 Apk, L = 10 mH, R
G
=
25 )
250
mJ
1. Mounted onto min pad board.
2. Mounted onto 1
″
pad board.
3. Switching characteristics are independent of operating junction tempera-
tures.
5.0 AMPERES
30 VOLTS
R
DS(on)
= 50 m
Device
Package
Shipping
ORDERING INFORMATION
NIMD6302R2
SOIC–8
2500/Tape & Reel
SOIC–8
CASE 751
STYLE 19
Mirror
Main
FET
Drain1
Source1
Mirror1
Gate1
Mirror 1
Drain 1
Mirror 2
Drain 2
Source 1
Gate 1
Source 2
Gate 2
(Top View)
MARKING DIAGRAM
N6302
AYWW
N6302
A
Y
WW
= Specific Device Code
= Assembly Location
= Year
= Work Week
1
2
3
4
5
6
7
8
http://onsemi.com
Mirror
Main
FET
Drain2
Source2
Mirror2
Gate2
ISOLATED DUAL PACKAGING
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| NIMD6302R2/D | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:HDPlus Dual N-Channel Self-Protected Field Effect Transistor with 1:200 Current Sense FET |
| NIMD6302R2_06 | 制造商:ONSEMI 制造商全稱(chēng):ON Semiconductor 功能描述:HDPlus Dual N−Channel Self−protected Field Effect Transistors with 1:200 Current Mirror FET |
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