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參數(shù)資料
| 型號(hào)： | NIF9N05CLT3G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | JFETs |
| 英文描述： | Protected Power MOSFET |
| 中文描述： | 2.6 A, 52 V, 0.125 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-261AA |
| 封裝： | LEAD FREE, CASE 318E-04, TO-261, 4 PIN |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大?。?/td> | 78K |
| 代理商： | NIF9N05CLT3G |
Semiconductor Components Industries, LLC, 2006
May, 2006 Rev. 5
1
Publication Order Number:
NIF9N05CL/D
NIF9N05CL
Protected Power MOSFET
2.6 A, 52 V, NChannel, Logic Level,
Clamped MOSFET w/ ESD Protection
in a SOT223 Package
Benefits
High Energy Capability for Inductive Loads
Low Switching Noise Generation
Features
Diode Clamp Between Gate and Source
ESD Protection HBM 5000 V
Active OverVoltage Gate to Drain Clamp
Scalable to Lower or Higher R
DS(on)
Internal Series Gate Resistance
PbFree Packages are Available
Applications
Automotive and Industrial Markets:
Solenoid Drivers, Lamp Drivers, Small Motor Drivers
MAXIMUM RATINGS
(T
J
= 25
°
C unless otherwise noted)
Rating
Symbol
Value
Unit
DraintoSource Voltage Internally Clamped
V
DSS
5259
V
GatetoSource Voltage Continuous
V
GS
±
15
V
Drain Current
Continuous @ T
A
= 25
°
C
Single Pulse (t
p
= 10 s) (Note 1)
I
D
I
DM
2.6
10
A
Total Power Dissipation @ T
A
= 25
°
C (Note 1)
P
D
1.69
W
Operating and Storage Temperature Range
T
J
, T
stg
55 to 150
°
C
Single Pulse DraintoSource
Avalanche Energy (V
DD
= 50 V, I
D(pk)
= 1.17
A, V
GS
= 10 V, L = 160 mH, R
G
= 25 )
E
AS
110
mJ
Thermal Resistance,
JunctiontoAmbient (Note 1)
JunctiontoAmbient (Note 2)
R
JA
R
JA
74
169
°
C/W
Maximum Lead Temperature for Soldering
Purposes, 1/8
″
from Case for 10 Seconds
T
L
260
°
C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to a FR4 board using 1
″
pad size, (Cu area 1.127 in
2
).
2. When surface mounted to a FR4 board using minimum recommended pad
size, (Cu area 0.412 in
2
).
M
PWR
Gate
(Pin 1)
R
G
Overvoltage
Protection
ESD Protection
http://onsemi.com
SOT223
CASE 318E
STYLE 3
DRAIN
GATE
DRAIN
SOURCE
(Top View)
MARKING DIAGRAM
A
F
A
Y
W
F9N05 = Specific Device Code
= PbFree Package
(Note: Microdot may be in either location)
= Assembly Location
= Year
= Work Week
1
2
3
4
V
DSS
(Clamped)
R
DS(ON)
TYP
I
D
MAX
52 V
107 m
2.6 A
Source
(Pin 3)
Drain
(Pins 2, 4)
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
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